Abstract: Non-synchronous breakage or line failure in power
systems with light or no loads can lead to core saturation in
transformers or potential transformers. This can cause component and
capacitance matching resulting in the formation of resonant circuits,
which trigger ferroresonance. This study employed a wavelet
transform for the detection of ferroresonance. Simulation results
demonstrate the efficacy of the proposed method.
Abstract: This paper discusses the undesirable charge transfer by the parasitic capacitances of the input transistors in a voltage sense amplifier. Due to its intrinsic rail-to-rail voltage transition, the input sides are inevitably disturbed. It can possible disturb the stabilities of the reference voltage levels. Moreover, it becomes serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the systems. In order to alleviate the internal node voltage transition, the internal node stabilization technique is proposed by utilizing an additional biasing circuit. It achieves 47% and 43% improvements for node stabilization and input referred disturbance, respectively.
Abstract: Differing from the structure of traditional parallel plate capacitive sensor a semi cylindrical capacitive sensor has been introduced in this present work to measure the soil moisture conveniently. Here, the numerical analysis method to evaluate the capacitance from the semi-cylindrical capacitive sensor is analyzed and discussed. The changes of capacitance with the variation of soil moisture obtained linear in the nano farad range (nF) and which converted into voltage variation by using proper signal conditioning circuit. Experimental results depict the satisfactory performance of the sensor for measurement of soil moisture in the range of 0 to 70%. We investigated the linearity of 4% of FSO and sensitivity of 70 mV/unit percentage changes in soil moisture level (DB).
Abstract: The present paper describes the development of a low cost, highly accurate low capacitance measurement system that can be used over a range of 0 – 400 pF with a resolution of 1 pF. The range of capacitance may be easily altered by a simple resistance or capacitance variation of the measurement circuit. This capacitance measurement system uses quad two-input NAND Schmitt trigger circuit CD4093B with hysteresis for the measurement and this system is integrated with PIC 18F2550 microcontroller for data acquisition purpose. The microcontroller interacts with software developed in the PC end through USB architecture and an attractive graphical user interface (GUI) based system is developed in the PC end to provide the user with real time, online display of capacitance under measurement. The system uses a differential mode of capacitance measurement, with reference to a trimmer capacitance, that effectively compensates lead capacitances, a notorious error encountered in usual low capacitance measurements. The hysteresis provided in the Schmitt-trigger circuits enable reliable operation of the system by greatly minimizing the possibility of false triggering because of stray interferences, usually regarded as another source of significant error. The real life testing of the proposed system showed that our measurements could produce highly accurate capacitance measurements, when compared to cutting edge, high end digital capacitance meters.
Abstract: In this paper, a power laterally-diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) on In0.53Ga0.47As is presented. The device utilizes a thicker field-oxide with low dielectric constant under the field-plate in order to achieve possible reduction in device capacitances and reduced-surface-field effect. Using 2D numerical simulations, performance of the proposed device is analyzed and compared with that of the conventional LDMOSFET. The proposed structure provides 50% increase in the breakdown voltage, 21% increase in transit frequency, and 72% improvement in figure-of-merit over the conventional device for same cell pitch.
Abstract: This paper presents the design and implementation of a fully integrated Capacitance-to-Voltage Converter (CVC) as the analog front-end for magnetometer interface IC. The application demands very low power solution operating in the frequency of around 20 KHz. The design adapts low power architecture to create low noise electronic interface for Capacitive Micro-machined Lorentz force magnetometer sensor. Using a 0.18-μm CMOS process, simulation results of this interface IC show that the proposed CVC can provide 33 dB closed loop gain, 20 nV/√Hz input referred noise at 20 KHz, while consuming 65 μA current from 1.8-V supply.
Abstract: Force sensor has been used as requisite for knowing information on the amount and the directions of forces on the skin surface. We have developed a four-degrees-of-freedom capacitive force sensor (approximately 20×20×5 mm3) that has a flexible structure and sixteen parallel plate capacitors. An iterative algorithm was developed for estimating four displacements from the sixteen capacitances using fourth-order polynomial approximation of characteristics between capacitance and displacement. The estimation results from measured capacitances had large error caused by deterioration of the characteristics. In this study, effective capacitors had major information were selected on the basis of the capacitance change range and the characteristic shape. Maximum errors in calibration and non-calibration points were 25%and 6.8%.However the maximum error was larger than desired value, the smallness of averaged value indicated the occurrence of a few large error points. On the other hand, error in non-calibration point was within desired value.
Abstract: This paper presents a resonant-based read-out circuit for capacitive pressure sensors. The proposed read-out circuit consists of an LC oscillator and a counter. The circuit detects the capacitance changes of a capacitive pressure sensor by means of frequency shifts from its nominal operation frequency. The proposed circuit is designed in 0.18 m CMOS with an estimated power consumption of 43.1mW. Simulation results show that the circuit has a capacitive resolution of 8.06kHz/fF, which enables it for high resolution pressure detection.
Abstract: In this work, new experimental data for slugging
frequency in inclined gas-liquid flow are reported, and a new
correlation is proposed. Scale experiments were carried out using a
mixture of air and water in a 6 m long pipe. Two different pipe
diameters were used, namely, 38 and 67 mm. The data were taken
with capacitance type sensors at a data acquisition frequency of 200
Hz over an interval of 60 seconds. For the range of flow conditions
studied, the liquid superficial velocity is observed to influence the
frequency strongly. A comparison of the present data with
correlations available in the literature reveals a lack of agreement. A
new correlation for slug frequency has been proposed for the inclined
flow, which represents the main contribution of this work.
Abstract: An electrical apparatus for measuring moisture
content was developed by our laboratory and uses dependence of
electrical properties on water content in studied material. Error
analysis of the apparatus was run by measuring different volumes of
water in a simplified specimen, i.e. hollow plexiglass block, in order
to avoid as many side-effects as possible. Obtained data were
processed using both basic and advanced statistics and results were
compared with each other. The influence of water content on
accuracy of measured data was studied as well as the influence of
variation of apparatus' proper arrangement or factual methodics of its
usage. The overall coefficient of variation was 4%. There was no
trend found in results of error dependence on water content.
Comparison with current surveys led to a conclusion, that the studied
apparatus can be used for indirect measurement of water content in
porous materials, with expectable error and under known conditions.
Factual experiments with porous materials are not involved, but are
currently under investigation.
Abstract: In contrast to conventional generators, self-excited induction generators are found to be most suitable machines for wind energy conversion in remote and windy areas due to many advantages over grid connected machines. This papers presents a Self-Excited Induction Generator (SEIG) driven by wind turbine and supplying an induction motor which is coupled to a centrifugal pump. A method to describe the steady state performance based on nodal analysis is presented. Therefore the advanced knowledge of the minimum excitation capacitor value is required. The effects of variation of excitation capacitance on system and rotor speed under different loading conditions have been analyzed and considered to optimize induction motor pump performances.
Abstract: In this paper, a technique is proposed to implement
an artificial voltage-controlled capacitance or inductance which can
replace the well-known varactor diode in many applications. The
technique is based on injecting the current of a voltage-controlled
current source onto a fixed capacitor or inductor. Then, by controlling
the transconductance of the current source by an external bias voltage,
a voltage-controlled capacitive or inductive reactance is obtained.
The proposed voltage-controlled reactance devices can be designed
to work anywhere in the frequency spectrum. Practical circuits for the
proposed voltage-controlled reactances are suggested and simulated.
Abstract: This paper presents the doping profile measurement
and characterization technique for the pocket implanted nano scale
n-MOSFET. Scanning capacitance microscopy and atomic force
microscopy have been used to image the extent of lateral dopant
diffusion in MOS structures. The data are capacitance vs. voltage
measurements made on a nano scale device. The technique is nondestructive
when imaging uncleaved samples. Experimental data from
the published literature are presented here on actual, cleaved device
structures which clearly indicate the two-dimensional dopant profile
in terms of a spatially varying modulated capacitance signal. Firstorder
deconvolution indicates the technique has much promise for
the quantitative characterization of lateral dopant profiles. The pocket
profile is modeled assuming the linear pocket profiles at the source
and drain edges. From the model, the effective doping concentration
is found to use in modeling and simulation results of the various
parameters of the pocket implanted nano scale n-MOSFET. The
potential of the technique to characterize important device related
phenomena on a local scale is also discussed.
Abstract: Three similar negative differential resistance (NDR)
profiles with both high peak to valley current density ratio (PVCDR)
value and high peak current density (PCD) value in unity resonant
tunneling electronic circuit (RTEC) element is developed in this paper.
The PCD values and valley current density (VCD) values of the three
NDR curves are all about 3.5 A and 0.8 A, respectively. All PV values
of NDR curves are 0.40 V, 0.82 V, and 1.35 V, respectively. The VV
values are 0.61 V, 1.07 V, and 1.69 V, respectively. All PVCDR
values reach about 4.4 in three NDR curves. The PCD value of 3.5 A
in triple PVCDR RTEC element is better than other resonant
tunneling devices (RTD) elements. The high PVCDR value is
concluded the lower VCD value about 0.8 A. The low VCD value is
achieved by suitable selection of resistors in triple PVCDR RTEC
element. The low PV value less than 1.35 V possesses low power
dispersion in triple PVCDR RTEC element. The designed multiple
value logical level (MVLL) system using triple PVCDR RTEC
element provides equidistant logical level. The logical levels of
MVLL system are about 0.2 V, 0.8 V, 1.5 V, and 2.2 V from low
voltage to high voltage and then 2.2 V, 1.3 V, 0.8 V, and 0.2 V from
high voltage back to low voltage in half cycle of sinusoid wave. The
output level of four levels MVLL system is represented in 0.3 V, 1.1 V,
1.7 V, and 2.6 V, which satisfies the NMP condition of traditional
two-bit system. The remarkable logical characteristic of improved
MVLL system with paralleled capacitor are with four significant
stable logical levels about 220 mV, 223 mV, 228 mV, and 230 mV.
The stability and articulation of logical levels of improved MVLL
system are outstanding. The average holding time of improved MVLL
system is approximately 0.14 μs. The holding time of improved
MVLL system is fourfold than of basic MVLL system. The function of
additional capacitor in the improved MVLL system is successfully
discovered.
Abstract: This paper presents development of an ignition system using spark electrodes for application in a research explosion vessel.
A single spark is aimed to be discharged with quantifiable ignition energy. The spark electrode system would enable study of flame
propagation, ignitability of fuel-air mixtures and other fundamental characteristics of flames. The principle of the capacitive spark circuit
of ASTM is studied to charge an appropriate capacitance connected across the spark gap through a large resistor by a high voltage from
the source of power supply until the initiation of spark. Different spark energies could be obtained mainly by varying the value of the
capacitance and the supply current. The spark sizes produced are found to be affected by the spark gap, electrode size, input voltage
and capacitance value.
Abstract: This paper presents two prototypes of low power low voltage current mode 9 bit pipelined a/d converters. The first and the second converters are configured of 1.5 bit and 2.5 bit stages, respectively. The a/d converter structures are composed of current mode building blocks and final comparator block which converts the analog current signal into digital voltage signal. All building blocks have been designed in CMOS AMS 0.35μm technology, then simulated to verify proposed concept. The performances of both converters are compared to performances of known current mode and voltage mode switched capacitance converter structures. Low power consumption and small chip area are advantages of the proposed converters.
Abstract: We have developed an analytic model for the radial pn-junction in a nanowire (NW) core-shell structure utilizing as a new
building block in different semiconductor devices. The potential distribution through the p-n-junction is calculated and the analytical expressions are derived to compute the depletion region widths. We
show that the widths of space charge layers, surrounding the core, are
the functions of core radius, which is the manifestation of so called classical size effect. The relationship between the depletion layer width and the built-in potential in the asymptotes of infinitely large
core radius transforms to square-root dependence specific for conventional planar p-n-junctions. The explicit equation is derived to
compute the capacitance of radial p-n-junction. The current-voltage behavior is also carefully determined taking into account the “short
base" effects.
Abstract: An on chip low drop out voltage regulator that
employs elegant compensation scheme is presented in this paper. The
novelty in this design is that the device parasitic capacitances are
exploited for compensation at different loads. The proposed LDO is
designed to provide a constant voltage of 1.2V and is implemented in
UMC 180 nano meter CMOS technology. The voltage regulator
presented improves stability even at lighter loads and enhances line
and load regulation.
Abstract: There are a many of needs for the development of
SiC-based hydrogen sensor for harsh environment applications. We
fabricated and investigated Pd/Ta2O5/SiC-based hydrogen sensors
with MOS capacitor structure for high temperature process monitoring
and leak detection applications in such automotive, chemical and
petroleum industries as well as direct monitoring of combustion
processes. In this work, we used silicon carbide (SiC) as a substrate to
replace silicon which operating temperatures are limited to below
200°C. Tantalum oxide was investigated as dielectric layer which has
high permeability for hydrogen gas and high dielectric permittivity,
compared with silicon dioxide or silicon nitride. Then, electrical
response properties, such as I-V curve and dependence of capacitance
on hydrogen concentrations were analyzed in the temperature ranges
of room temperature to 500°C for performance evaluation of the
sensor.
Abstract: In this paper we present an energy efficient match-line
(ML) sensing scheme for high-speed ternary content-addressable
memory (TCAM). The proposed scheme isolates the sensing unit of
the sense amplifier from the large and variable ML capacitance. It
employs feedback in the sense amplifier to successfully detect a
match while keeping the ML voltage swing low. This reduced voltage
swing results in large energy saving. Simulation performed using
130nm 1.2V CMOS logic shows at least 30% total energy saving in
our scheme compared to popular current race (CR) scheme for
similar search speed. In terms of speed, dynamic energy, peak power
consumption and transistor count our scheme also shows better
performance than mismatch-dependant (MD) power allocation
technique which also employs feedback in the sense amplifier.
Additionally, the implementation of our scheme is simpler than CR
or MD scheme because of absence of analog control voltage and
programmable delay circuit as have been used in those schemes.