Abstract: Circuit switched networks widely used until the end of the 20th century have been transformed into packages switched networks. Time Division Multiplexing over Internet Protocol (TDMoIP) is a system that enables Time Division Multiplexing (TDM) traffic to be carried over packet switched networks (PSN). In TDMoIP systems, devices that send TDM data to the PSN and receive it from the network must operate with the same clock frequency. In this study, it was aimed to implement clock synchronization process in Field Programmable Gate Array (FPGA) chips using time information attached to the packages received from PSN. The designed hardware is verified using the datasets obtained for the different carrier types and comparing the results with the software model. Field tests are also performed by using the real time TDMoIP system.
Abstract: Fuzzy inference method based approach to the
forming of modular intellectual system of assessment the quality of
communication services is proposed. Developed under this approach
the basic fuzzy estimation model takes into account the
recommendations of the International Telecommunication Union in
respect of the operation of packet switching networks based on IPprotocol.
To implement the main features and functions of the fuzzy
control system of quality telecommunication services it is used
multilayer feedforward neural network.
Abstract: The performance of the Optical Code Division Multiplexing/ Wavelength Division Multiplexing (WDM/OCDM) technique for Optical Packet Switch is investigated. The impact on the performance of the impairment due to both Multiple Access Interference and Beat noise is studied. The Packet Loss Probability due to output packet contentions is evaluated as a function of the main switch and traffic parameters when Gold coherent optical codes are adopted. The Packet Loss Probability of the OCDM/WDM switch can reach 10-9 when M=16 wavelengths, Gold code of length L=511 and only 24 wavelength converters are used in the switch.
Abstract: We evaluate the average energy consumption per bit
in Optical Packet Switches equipped with BENES switching fabric
realized in Semiconductor Optical Amplifier (SOA) technology. We
also study the impact that the Amplifier Spontaneous Emission
(ASE) noise generated by a transmission system has on the power
consumption of the BENES switches due to the gain saturation of the
SOAs used to realize the switching fabric. As a matter of example for
32×32 switches supporting 64 wavelengths and offered traffic equal
to 0,8, the average energy consumption per bit is 2, 34 · 10-1 nJ/bit
and increases if ASE noise introduced by the transmission systems
is increased.
Abstract: Packet switched data network like Internet, which has
traditionally supported throughput sensitive applications such as email
and file transfer, is increasingly supporting delay-sensitive
multimedia applications such as interactive video. These delaysensitive
applications would often rather sacrifice some throughput
for better delay. Unfortunately, the current packet switched network
does not offer choices, but instead provides monolithic best-effort
service to all applications. This paper evaluates Class Based Queuing
(CBQ), Coordinated Earliest Deadline First (CEDF), Weighted
Switch Deficit Round Robin (WSDRR) and RED-Boston scheduling
schemes that is sensitive to delay bound expectations for variety of
real time applications and an enhancement of WSDRR is proposed.
Abstract: Over the past several years, there has been a
considerable amount of research within the field of Quality of
Service (QoS) support for distributed multimedia systems. One of the
key issues in providing end-to-end QoS guarantees in packet
networks is determining a feasible path that satisfies a number of
QoS constraints. The problem of finding a feasible path is NPComplete
if number of constraints is more than two and cannot be
exactly solved in polynomial time. We proposed Feasible Path
Selection Algorithm (FPSA) that addresses issues with pertain to
finding a feasible path subject to delay and cost constraints and it
offers higher success rate in finding feasible paths.
Abstract: A synchronous network-on-chip using wormhole packet switching
and supporting guaranteed-completion best-effort with low-priority (LP)
and high-priority (HP) wormhole packet delivery service is presented in
this paper. Both our proposed LP and HP message services deliver a good
quality of service in term of lossless packet completion and in-order message
data delivery. However, the LP message service does not guarantee minimal
completion bound. The HP packets will absolutely use 100% bandwidth of
their reserved links if the HP packets are injected from the source node with
maximum injection. Hence, the service are suitable for small size messages
(less than hundred bytes). Otherwise the other HP and LP messages, which
require also the links, will experience relatively high latency depending on the
size of the HP message. The LP packets are routed using a minimal adaptive
routing, while the HP packets are routed using a non-minimal adaptive routing
algorithm. Therefore, an additional 3-bit field, identifying the packet type,
is introduced in their packet headers to classify and to determine the type
of service committed to the packet. Our NoC prototypes have been also
synthesized using a 180-nm CMOS standard-cell technology to evaluate the
cost of implementing the combination of both services.
Abstract: The power consumption of an Optical Packet Switch
equipped with SOA technology based Spanke switching fabric is
evaluated. Sophisticated analytical models are introduced to evaluate
the power consumption versus the offered traffic, the main
switch parameters, and the used device characteristics. The impact
of Amplifier Spontaneous Emission (ASE) noise generated by a
transmission system on the power consumption is investigated. As
a matter of example for 32×32 switches supporting 64 wavelengths
and offered traffic equal to 0,8, the average energy consumption per
bit is 5, 07 · 10-2 nJ/bit and increases if ASE noise introduced by
the transmission systems is increased.
Abstract: Quality of Service (QoS) Routing aims to find path between source and destination satisfying the QoS requirements which efficiently using the network resources and underlying routing algorithm and to fmd low-cost paths that satisfy given QoS constraints. One of the key issues in providing end-to-end QoS guarantees in packet networks is determining feasible path that satisfies a number of QoS constraints. We present a Optimized Multi- Constrained Routing (OMCR) algorithm for the computation of constrained paths for QoS routing in computer networks. OMCR applies distance vector to construct a shortest path for each destination with reference to a given optimization metric, from which a set of feasible paths are derived at each node. OMCR is able to fmd feasible paths as well as optimize the utilization of network resources. OMCR operates with the hop-by-hop, connectionless routing model in IP Internet and does not create any loops while fmding the feasible paths. Nodes running OMCR not necessarily maintaining global view of network state such as topology, resource information and routing updates are sent only to neighboring nodes whereas its counterpart link-state routing method depend on complete network state for constrained path computation and that incurs excessive communication overhead.
Abstract: In this paper, genetic algorithm (GA) is proposed for
the design of an optimization algorithm to achieve the bandwidth
allocation of ATM network. In Broadband ISDN, the ATM is a highbandwidth;
fast packet switching and multiplexing technique. Using
ATM it can be flexibly reconfigure the network and reassign the
bandwidth to meet the requirements of all types of services. By
dynamically routing the traffic and adjusting the bandwidth
assignment, the average packet delay of the whole network can be
reduced to a minimum. M/M/1 model can be used to analyze the
performance.
Abstract: In this paper, 3X3 routing nodes are proposed to
provide speedup and parallel processing capability in Data Vortex
network architectures. The new design not only significantly
improves network throughput and latency, but also eliminates the
need for distributive traffic control mechanism originally embedded
among nodes and the need for nodal buffering. The cost effectiveness
is studied by a comparison study with the previously proposed 2-
input buffered networks, and considerable performance enhancement
can be achieved with similar or lower cost of hardware. Unlike
previous implementation, the network leaves small probability of
contention, therefore, the packet drop rate must be kept low for such
implementation to be feasible and attractive, and it can be achieved
with proper choice of operation conditions.