How to Integrate Sustainability in Technological Degrees: Robotics at UPC

Embedding Sustainability in technological curricula has become a crucial factor for educating engineers with competences in sustainability. The Technical University of Catalonia UPC, in 2008, designed the Sustainable Technology Excellence Program STEP 2015 in order to assure a successful Sustainability Embedding. This Program takes advantage of the opportunity that the redesign of all Bachelor and Master Degrees in Spain by 2010 under the European Higher Education Area framework offered. The STEP program goals are: to design compulsory courses in each degree; to develop the conceptual base and identify reference models in sustainability for all specialties at UPC; to create an internal interdisciplinary network of faculty from all the schools; to initiate new transdisciplinary research activities in technology-sustainability-education; to spread the know/how attained; to achieve international scientific excellence in technology-sustainability-education and to graduate the first engineers/architects of the new EHEA bachelors with sustainability as a generic competence. Specifically, in this paper authors explain their experience in leading the STEP program, and two examples are presented: Industrial Robotics subject and the curriculum for the School of Architecture.

Bridged Quantum Cellular Automata based on Si/SiO2 Superlattices

The new architecture for quantum cellular automata is offered. A QCA cell includes two layers nc-Si, divided by a dielectric. Among themselves cells are connected by the bridge from a conductive material. The comparison is made between this and QCA, offered earlier by C. Lent's group.

Cooperative Multi Agent Soccer Robot Team

This paper introduces our first efforts of developing a new team for RoboCup Middle Size Competition. In our robots we have applied omni directional based mobile system with omnidirectional vision system and fuzzy control algorithm to navigate robots. The control architecture of MRL middle-size robots is a three layered architecture, Planning, Sequencing, and Executing. It also uses Blackboard system to achieve coordination among agents. Moreover, the architecture should have minimum dependency on low level structure and have a uniform protocol to interact with real robot.

Hardware Description Language Design of Σ-Δ Fractional-N Phase-Locked Loop for Wireless Applications

This paper discusses a systematic design of a Σ-Δ fractional-N Phase-Locked Loop based on HDL behavioral modeling. The proposed design consists in describing the mixed behavior of this PLL architecture starting from the specifications of each building block. The HDL models of critical PLL blocks have been described in VHDL-AMS to predict the different specifications of the PLL. The effect of different noise sources has been efficiently introduced to study the PLL system performances. The obtained results are compared with transistor-level simulations to validate the effectiveness of the proposed models for wireless applications in the frequency range around 2.45 GHz.

Information System for Data Selection and New Information Acquisition for Reconfigurable Multifunctional Machine Tools

The purpose of the paper is to develop an informationcontrol environment for overall management and self-reconfiguration of the reconfigurable multifunctional machine tool for machining both rotation and prismatic parts and high concentration of different technological operations - turning, milling, drilling, grinding, etc. For the realization of this purpose on the basis of defined sub-processes for the implementation of the technological process, architecture of the information-search system for machine control is suggested. By using the object-oriented method, a structure and organization of the search system based on agents and manager with central control are developed. Thus conditions for identification of available information in DBs, self-reconfiguration of technological system and entire control of the reconfigurable multifunctional machine tool are created.

A 24-Bit, 8.1-MS/s D/A Converter for Audio Baseband Channel Applications

This paper study the high-level modelling and design of delta-sigma (ΔΣ) noise shapers for audio Digital-to-Analog Converter (DAC) so as to eliminate the in-band Signal-to-Noise- Ratio (SNR) degradation that accompany one channel mismatch in audio signal. The converter combines a cascaded digital signal interpolation, a noise-shaping single loop delta-sigma modulator with a 5-bit quantizer resolution in the final stage. To reduce sensitivity of Digital-to-Analog Converter (DAC) nonlinearities of the last stage, a high pass second order Data Weighted Averaging (R2DWA) is introduced. This paper presents a MATLAB description modelling approach of the proposed DAC architecture with low distortion and swing suppression integrator designs. The ΔΣ Modulator design can be configured as a 3rd-order and allows 24-bit PCM at sampling rate of 64 kHz for Digital Video Disc (DVD) audio application. The modeling approach provides 139.38 dB of dynamic range for a 32 kHz signal band at -1.6 dBFS input signal level.

Context-Aware Querying in Multimedia Databases – A Futuristic Approach

Efficient retrieval of multimedia objects has gained enormous focus in recent years. A number of techniques have been suggested for retrieval of textual information; however, relatively little has been suggested for efficient retrieval of multimedia objects. In this paper we have proposed a generic architecture for contextaware retrieval of multimedia objects. The proposed framework combines the well-known approaches of text-based retrieval and context-aware retrieval to formulate architecture for accurate retrieval of multimedia data.

Performances Comparison of Neural Architectures for On-Line Speed Estimation in Sensorless IM Drives

The performance of sensor-less controlled induction motor drive depends on the accuracy of the estimated speed. Conventional estimation techniques being mathematically complex require more execution time resulting in poor dynamic response. The nonlinear mapping capability and powerful learning algorithms of neural network provides a promising alternative for on-line speed estimation. The on-line speed estimator requires the NN model to be accurate, simpler in design, structurally compact and computationally less complex to ensure faster execution and effective control in real time implementation. This in turn to a large extent depends on the type of Neural Architecture. This paper investigates three types of neural architectures for on-line speed estimation and their performance is compared in terms of accuracy, structural compactness, computational complexity and execution time. The suitable neural architecture for on-line speed estimation is identified and the promising results obtained are presented.

A Quality Optimization Approach: An Application on Next Generation Networks

The next generation wireless systems, especially the cognitive radio networks aim at utilizing network resources more efficiently. They share a wide range of available spectrum in an opportunistic manner. In this paper, we propose a quality management model for short-term sub-lease of unutilized spectrum bands to different service providers. We built our model on competitive secondary market architecture. To establish the necessary conditions for convergent behavior, we utilize techniques from game theory. Our proposed model is based on potential game approach that is suitable for systems with dynamic decision making. The Nash equilibrium point tells the spectrum holders the ideal price values where profit is maximized at the highest level of customer satisfaction. Our numerical results show that the price decisions of the network providers depend on the price and QoS of their own bands as well as the prices and QoS levels of their opponents- bands.

Sustainable Architecture Analyses of Walls in Miyaneh Village Houses, Iran

Even though so many efforts have been taken to renovate and renew the architecture of Miyaneh villages in cold and dry regions of Iran-s northwest, these efforts failed due to lack of significant study and ignoring the past and sustainable history of those villages. Considering the overpopulation of Iran-s villages as well as the importance in preventing their immigration to cities, recognizing village architecture and its construction technology is of great significance to attain sustainable residence in villages. As the only vertical surface in the space, wall possesses its unique special characteristics, and it is also a very important architectural element able to provide the immunity and comfort space for the residents. This article analyzes the characteristics of this vertical element, main types of adobe and stone walls, locally constructed technologies, implementation, the elements forming the walls in the frame of village house typology of Miyaneh, which has the most villages in East Azerbaijan, based on sustainable architectural construction materials of walls.

Effect of Blade Number on a Straight-Bladed Vertical-Axis Darreius Wind Turbine

This paper presents a mean for reducing the torque variation during the revolution of a vertical-axis wind turbine (VAWT) by increasing the blade number. For this purpose, twodimensional CDF analysis have been performed on a straight-bladed Darreius-type rotor. After describing the computational model, a complete campaign of simulations based on full RANS unsteady calculations is proposed for a three, four and five-bladed rotor architecture characterized by a NACA 0025 airfoil. For each proposed rotor configuration, flow field characteristics are investigated at several values of tip speed ratio, allowing a quantification of the influence of blade number on flow geometric features and dynamic quantities, such as rotor torque and power. Finally, torque and power curves are compared for the analyzed architectures, achieving a quantification of the effect of blade number on overall rotor performance.

Service-Oriented Architecture for Object- Centric Information Fusion

In many applications there is a broad variety of information relevant to a focal “object" of interest, and the fusion of such heterogeneous data types is desirable for classification and categorization. While these various data types can sometimes be treated as orthogonal (such as the hull number, superstructure color, and speed of an oil tanker), there are instances where the inference and the correlation between quantities can provide improved fusion capabilities (such as the height, weight, and gender of a person). A service-oriented architecture has been designed and prototyped to support the fusion of information for such “object-centric" situations. It is modular, scalable, and flexible, and designed to support new data sources, fusion algorithms, and computational resources without affecting existing services. The architecture is designed to simplify the incorporation of legacy systems, support exact and probabilistic entity disambiguation, recognize and utilize multiple types of uncertainties, and minimize network bandwidth requirements.

Performance Analysis of Evolutionary ANN for Output Prediction of a Grid-Connected Photovoltaic System

This paper presents performance analysis of the Evolutionary Programming-Artificial Neural Network (EPANN) based technique to optimize the architecture and training parameters of a one-hidden layer feedforward ANN model for the prediction of energy output from a grid connected photovoltaic system. The ANN utilizes solar radiation and ambient temperature as its inputs while the output is the total watt-hour energy produced from the grid-connected PV system. EP is used to optimize the regression performance of the ANN model by determining the optimum values for the number of nodes in the hidden layer as well as the optimal momentum rate and learning rate for the training. The EPANN model is tested using two types of transfer function for the hidden layer, namely the tangent sigmoid and logarithmic sigmoid. The best transfer function, neural topology and learning parameters were selected based on the highest regression performance obtained during the ANN training and testing process. It is observed that the best transfer function configuration for the prediction model is [logarithmic sigmoid, purely linear].

Studying on ARINC653 Partition Run-time Scheduling and Simulation

Avionics software is safe-critical embedded software and its architecture is evolving from traditional federated architectures to Integrated Modular Avionics (IMA) to improve resource usability. ARINC 653 (Avionics Application Standard Software Interface) is a software specification for space and time partitioning in Safety-critical avionics Real-time operating systems. Arinc653 uses two-level scheduling strategies, but current modeling tools only apply to simple problems of Arinc653 two-level scheduling, which only contain time property. In avionics industry, we are always manually allocating tasks and calculating the timing table of a real-time system to ensure it-s running as we design. In this paper we represent an automatically generating strategy which applies to the two scheduling problems with dependent constraints in Arinc653 partition run-time environment. It provides the functionality of automatic generation from the task and partition models to scheduling policy through allocating the tasks to the partitions while following the constraints, and then we design a simulating mechanism to check whether our policy is schedulable or not

The Experience of Iranian Architecture in Direction of Urban Passages and Forming of Urban Structures to Increase Climatic Comfort

Iran has diverse climates and each have established distinct properties in their area. The extent and intensity of climatic factors effects on the lives of people living in various regions of Iran is so great that it cannot be simply ignored. In a large part of Iran known as the Central Plateau there is no precipitation for more than half of the year and dry weather and scarcity of fresh water pose an ever present problem for the people of these regions while in north of Iran upon the southern shores of the Caspian Sea the people face 80% humidity caused by the sea and 2 meters of annual precipitation. This article tries to review the past experiences of local architecture of Iran-s various regions so that they can be used to reshape and redirect the urban areas and structure of Iran-s current cities to provide environmental comfort by minimum use of fossil fuels.

Assamese Numeral Speech Recognition using Multiple Features and Cooperative LVQ -Architectures

A set of Artificial Neural Network (ANN) based methods for the design of an effective system of speech recognition of numerals of Assamese language captured under varied recording conditions and moods is presented here. The work is related to the formulation of several ANN models configured to use Linear Predictive Code (LPC), Principal Component Analysis (PCA) and other features to tackle mood and gender variations uttering numbers as part of an Automatic Speech Recognition (ASR) system in Assamese. The ANN models are designed using a combination of Self Organizing Map (SOM) and Multi Layer Perceptron (MLP) constituting a Learning Vector Quantization (LVQ) block trained in a cooperative environment to handle male and female speech samples of numerals of Assamese- a language spoken by a sizable population in the North-Eastern part of India. The work provides a comparative evaluation of several such combinations while subjected to handle speech samples with gender based differences captured by a microphone in four different conditions viz. noiseless, noise mixed, stressed and stress-free.

Multilevel Activation Functions For True Color Image Segmentation Using a Self Supervised Parallel Self Organizing Neural Network (PSONN) Architecture: A Comparative Study

The paper describes a self supervised parallel self organizing neural network (PSONN) architecture for true color image segmentation. The proposed architecture is a parallel extension of the standard single self organizing neural network architecture (SONN) and comprises an input (source) layer of image information, three single self organizing neural network architectures for segmentation of the different primary color components in a color image scene and one final output (sink) layer for fusion of the segmented color component images. Responses to the different shades of color components are induced in each of the three single network architectures (meant for component level processing) by applying a multilevel version of the characteristic activation function, which maps the input color information into different shades of color components, thereby yielding a processed component color image segmented on the basis of the different shades of component colors. The number of target classes in the segmented image corresponds to the number of levels in the multilevel activation function. Since the multilevel version of the activation function exhibits several subnormal responses to the input color image scene information, the system errors of the three component network architectures are computed from some subnormal linear index of fuzziness of the component color image scenes at the individual level. Several multilevel activation functions are employed for segmentation of the input color image scene using the proposed network architecture. Results of the application of the multilevel activation functions to the PSONN architecture are reported on three real life true color images. The results are substantiated empirically with the correlation coefficients between the segmented images and the original images.

Low Power Circuit Architecture of AES Crypto Module for Wireless Sensor Network

Recently, much research has been conducted for security for wireless sensor networks and ubiquitous computing. Security issues such as authentication and data integrity are major requirements to construct sensor network systems. Advanced Encryption Standard (AES) is considered as one of candidate algorithms for data encryption in wireless sensor networks. In this paper, we will present the hardware architecture to implement low power AES crypto module. Our low power AES crypto module has optimized architecture of data encryption unit and key schedule unit which could be applicable to wireless sensor networks. We also details low power design methods used to design our low power AES crypto module.

Definition of Cognitive Infocommunications and an Architectural Implementation of Cognitive Infocommunications Systems

Cognitive Infocommunications (CogInfoCom) is a new research direction which has emerged as the synergic convergence of infocommunications and the cognitive sciences. In this paper, we provide the definition of CogInfoCom, and propose an architectural framework for the interaction-oriented design of CogInfoCom systems. We provide the outlines of an application example of the interaction-oriented architecture, and briefly discuss its main characteristics.

Flexible Wormhole-Switched Network-on-chip with Two-Level Priority Data Delivery Service

A synchronous network-on-chip using wormhole packet switching and supporting guaranteed-completion best-effort with low-priority (LP) and high-priority (HP) wormhole packet delivery service is presented in this paper. Both our proposed LP and HP message services deliver a good quality of service in term of lossless packet completion and in-order message data delivery. However, the LP message service does not guarantee minimal completion bound. The HP packets will absolutely use 100% bandwidth of their reserved links if the HP packets are injected from the source node with maximum injection. Hence, the service are suitable for small size messages (less than hundred bytes). Otherwise the other HP and LP messages, which require also the links, will experience relatively high latency depending on the size of the HP message. The LP packets are routed using a minimal adaptive routing, while the HP packets are routed using a non-minimal adaptive routing algorithm. Therefore, an additional 3-bit field, identifying the packet type, is introduced in their packet headers to classify and to determine the type of service committed to the packet. Our NoC prototypes have been also synthesized using a 180-nm CMOS standard-cell technology to evaluate the cost of implementing the combination of both services.