Abstract: A 10bit, 40 MSps, sample and hold, implemented in 0.18-μm CMOS technology with 3.3V supply, is presented for application in the front-end stage of an analog-to-digital converter. Topology selection, biasing, compensation and common mode feedback are discussed. Cascode technique has been used to increase the dc gain. The proposed opamp provides 149MHz unity-gain bandwidth (wu), 80 degree phase margin and a differential peak to peak output swing more than 2.5v. The circuit has 55db Total Harmonic Distortion (THD), using the improved fully differential two stage operational amplifier of 91.7dB gain. The power dissipation of the designed sample and hold is 4.7mw. The designed system demonstrates relatively suitable response in different process, temperature and supply corners (PVT corners).
Abstract: As wind, solar and other clean and green energy
sources gain popularity worldwide, engineers are seeking ways to
make renewable energy systems more affordable and to integrate
them with existing ac power grids. In the present paper an attempt
has been made for integrating the PV arrays to the smart nano grid
using an artificial intelligent (AI) based solar powered cascade multilevel
inverter. The AI based controller switching scheme has been
used for improving the power quality by reducing the Total Harmonic
Distortion (THD) of the multi-level inverter output voltage.
Abstract: Nowadays Multilevel inverters are widely using in various applications. Modulation strategy at fundamental switching frequency like, SHEPWM is prominent technique to eliminate lower order of harmonics with less switching losses and better harmonic profile. The equations which are formed by SHE are highly nonlinear transcendental in nature, there may exist single, multiple or even no solutions for a particular MI. However, some loads such as electrical drives, it is required to operate in whole range of MI. In order to solve SHE equations for whole range of MI, intelligent techniques are well suited to solve equations so as to produce lest %THDV. Hence, this paper uses Continuous genetic algorithm for minimising harmonics. This paper also presents wavelet based analysis of harmonics. The developed algorithm is simulated and %THD from FFT analysis and Wavelet analysis are compared. MATLAB programming environment and SIMULINK models are used whenever necessary.
Abstract: The range of the output power is a very important and evident limitation of two-level inverters. In order to overcome this disadvantage, multilevel inverters are introduced. Recently, Cascade H-Bridge inverters have emerged as one of the popular converter topologies used in numerous industrial applications. The modulation switching strategies such as phase shifted carrier based Pulse Width Modulation (PWM) technique and Stair case modulation with Selective Harmonic Elimination (SHE) PWM technique are generally used. NR method is used to solve highly non linear transcendental equations which are formed by SHEPWM method. Generally NR method has a drawback of requiring good initial guess but in this paper a new approach is implemented for NR method with any random initial guess. A three phase CHB 11-level inverter is chosen for analysis. MATLAB/SIMULINK programming environment and harmonic profiles are compared. Finally this paper presents a method at fundamental switching frequency with least % THDV.
Abstract: This paper present a MATLAB-SIMULINK model of a single phase 2.5 KVA, 240V RMS controlled PV VSI (Photovoltaic Voltage Source Inverter) inverter using IGBTs (Insulated Gate Bipolar Transistor). The behavior of output voltage, output current, and the total harmonic distortion (THD), with the variation in input dc blocking capacitor (Cdc), for linear and non-linear load has been analyzed. The values of Cdc as suggested by the other authors in their papers are not clearly defined and it poses difficulty in selecting the proper value. As the dc power stored in Cdc, (generally placed parallel with battery) is used as input to the VSI inverter. The simulation results shows the variation in the output voltage and current with different values of Cdc for linear and non-linear load connected at the output side of PV VSI inverter and suggest the selection of suitable value of Cdc.
Abstract: A high-frequency low-power sinusoidal quadrature
oscillator is presented through the use of two 2nd-order low-pass
current-mirror (CM)-based filters, a 1st-order CM low-pass filter and
a CM bilinear transfer function. The technique is relatively simple
based on (i) inherent time constants of current mirrors, i.e. the
internal capacitances and the transconductance of a diode-connected
NMOS, (ii) a simple negative resistance RN formed by a resistor load
RL of a current mirror. Neither external capacitances nor inductances
are required. As a particular example, a 1.9-GHz, 0.45-mW, 2-V
CMOS low-pass-filter-based all-current-mirror sinusoidal quadrature
oscillator is demonstrated. The oscillation frequency (f0) is 1.9 GHz
and is current-tunable over a range of 370 MHz or 21.6 %. The
power consumption is at approximately 0.45 mW. The amplitude
matching and the quadrature phase matching are better than 0.05 dB
and 0.15°, respectively. Total harmonic distortions (THD) are less
than 0.3 %. At 2 MHz offset from the 1.9 GHz, the carrier to noise
ratio (CNR) is 90.01 dBc/Hz whilst the figure of merit called a
normalized carrier-to-noise ratio (CNRnorm) is 153.03 dBc/Hz. The
ratio of the oscillation frequency (f0) to the unity-gain frequency (fT)
of a transistor is 0.25. Comparisons to other approaches are also
included.