Abstract: Deep learning structure is a branch of machine learning science and greet achievement in research and applications. Cellular neural networks are regarded as array of nonlinear analog processors called cells connected in a way allowing parallel computations. The paper discusses how to use deep learning structure for representing neural cellular automata model. The proposed learning technique in cellular automata model will be examined from structure of deep learning. A deep automata neural cellular system modifies each neuron based on the behavior of the individual and its decision as a result of multi-level deep structure learning. The paper will present the architecture of the model and the results of simulation of approach are given. Results from the implementation enrich deep neural cellular automata system and shed a light on concept formulation of the model and the learning in it.
Abstract: The aim of this work is the parallel implementation
of k-means in MATLAB, in order to reduce the execution time.
Specifically, a new function in MATLAB for serial k-means algorithm
is developed, which meets all the requirements for the conversion to a
function in MATLAB with parallel computations. Additionally, two
different variants for the definition of initial values are presented.
In the sequel, the parallel approach is presented. Finally, the
performance tests for the computation times respect to the numbers
of features and classes are illustrated.
Abstract: This paper describes the Message Passing Interface
(MPI) implementation of ADETRAN language, and its evaluation
on SX-ACE supercomputers. ADETRAN language includes pdo
statement that specifies the data distribution and parallel computations
and pass statement that specifies the redistribution of arrays. Two
methods for implementation of pass statement are discussed and the
performance evaluation using Splitting-Up CG method is presented.
The effectiveness of the parallelization is evaluated and the advantage
of one dimensional distribution is empirically confirmed by using the
results of experiments.
Abstract: In this paper we present the PC cluster built at R.V.
College of Engineering (with great help from the Department of
Computer Science and Electrical Engineering). The structure of the
cluster is described and the performance is evaluated by rendering of
complex 3D Persistence of Vision (POV) images by the Ray-Tracing
algorithm. Here, we propose an unexampled method to render such
images, distributedly on a low cost scalable.
Abstract: A novel methodology has been used to design an
evaporator coil of a refrigerant. The methodology used is through a
complete Computer Aided Design /Computer Aided Engineering
approach, by means of a Computational Fluid Dynamic/Finite
Element Analysis model which is executed many times for the
thermal-fluid exploration of several designs' configuration by an
commercial optimizer. Hence the design is carried out automatically
by parallel computations, with an optimization package taking the
decisions rather than the design engineer. The engineer instead takes
decision regarding the physical settings and initializing of the
computational models to employ, the number and the extension of the
geometrical parameters of the coil fins and the optimization tools to
be employed. The final design of the coil geometry found to be better
than the initial design.
Abstract: Parallel programming models exist as an abstraction
of hardware and memory architectures. There are several parallel
programming models in commonly use; they are shared memory
model, thread model, message passing model, data parallel model,
hybrid model, Flynn-s models, embarrassingly parallel computations
model, pipelined computations model. These models are not specific
to a particular type of machine or memory architecture. This paper
expresses the model program for concurrent approach to data parallel
model through java programming.
Abstract: Encryption and decryption in RSA are done by modular exponentiation which is achieved by repeated modular multiplication. Hence efficiency of modular multiplication directly determines the efficiency of RSA cryptosystem. This paper designs a Modified Montgomery Modular Multiplication in which addition of operands is computed by 4:2 compressor. The basic logic operations in addition are partitioned over two iterations such that parallel computations are performed. This reduces the critical path delay of proposed Montgomery design. The proposed design and RSA are implemented on Virtex 2 and Virtex 5 FPGAs. The two factors partitioning and parallelism have improved the frequency and throughput of proposed design.
Abstract: The rapid improvement of the microprocessor and network has made it possible for the PC cluster to compete with conventional supercomputers. Lots of high throughput type of applications can be satisfied by using the current desktop PCs, especially for those in PC classrooms, and leave the supercomputers for the demands from large scale high performance parallel computations. This paper presents our development on enabling an automated deployment mechanism for cluster computing to utilize the computing power of PCs such as reside in PC classroom. After well deployment, these PCs can be transformed into a pre-configured cluster computing resource immediately without touching the existing education/training environment installed on these PCs. Thus, the training activities will not be affected by this additional activity to harvest idle computing cycles. The time and manpower required to build and manage a computing platform in geographically distributed PC classrooms also can be reduced by this development.