Abstract: A new genetic algorithm, termed the 'optimum individual monogenetic genetic algorithm' (OIMGA), is presented whose properties have been deliberately designed to be well suited to hardware implementation. Specific design criteria were to ensure fast access to the individuals in the population, to keep the required silicon area for hardware implementation to a minimum and to incorporate flexibility in the structure for the targeting of a range of applications. The first two criteria are met by retaining only the current optimum individual, thereby guaranteeing a small memory requirement that can easily be stored in fast on-chip memory. Also, OIMGA can be easily reconfigured to allow the investigation of problems that normally warrant either large GA populations or individuals many genes in length. Local convergence is achieved in OIMGA by retaining elite individuals, while population diversity is ensured by continually searching for the best individuals in fresh regions of the search space. The results given in this paper demonstrate that both the performance of OIMGA and its convergence time are superior to those of a range of existing hardware GA implementations.
Abstract: This paper proposes a low power SRAM based on
five transistor SRAM cell. Proposed SRAM uses novel word-line
decoding such that, during read/write operation, only selected cell
connected to bit-line whereas, in conventional SRAM (CV-SRAM),
all cells in selected row connected to their bit-lines, which in turn
develops differential voltages across all bit-lines, and this makes
energy consumption on unselected bit-lines. In proposed SRAM
memory array divided into two halves and this causes data-line
capacitance to reduce. Also proposed SRAM uses one bit-line and
thus has lower bit-line leakage compared to CV-SRAM.
Furthermore, the proposed SRAM incurs no area overhead, and has
comparable read/write performance versus the CV-SRAM.
Simulation results in standard 0.25μm CMOS technology shows in
worst case proposed SRAM has 80% smaller dynamic energy
consumption in each cycle compared to CV-SRAM. Besides, energy
consumption in each cycle of proposed SRAM and CV-SRAM
investigated analytically, the results of which are in good agreement
with the simulation results.
Abstract: Vision-based intelligent vehicle applications often require large amounts of memory to handle video streaming and image processing, which in turn increases complexity of hardware and software. This paper presents an FPGA implement of a vision-based blind spot warning system. Using video frames, the information of the blind spot area turns into one-dimensional information. Analysis of the estimated entropy of image allows the detection of an object in time. This idea has been implemented in the XtremeDSP video starter kit. The blind spot warning system uses only 13% of its logic resources and 95k bits block memory, and its frame rate is over 30 frames per sec (fps).
Abstract: How to effectively allocate system resource to process
the Client request by Gateway servers is a challenging problem. In
this paper, we propose an improved scheme for autonomous
performance of Gateway servers under highly dynamic traffic loads.
We devise a methodology to calculate Queue Length and Waiting
Time utilizing Gateway Server information to reduce response time
variance in presence of bursty traffic. The most widespread
contemplation is performance, because Gateway Servers must offer
cost-effective and high-availability services in the elongated period,
thus they have to be scaled to meet the expected load. Performance
measurements can be the base for performance modeling and
prediction. With the help of performance models, the performance
metrics (like buffer estimation, waiting time) can be determined at
the development process. This paper describes the possible queue
models those can be applied in the estimation of queue length to
estimate the final value of the memory size. Both simulation and
experimental studies using synthesized workloads and analysis of
real-world Gateway Servers demonstrate the effectiveness of the
proposed system.
Abstract: The increasing importance of data stream arising in a
wide range of advanced applications has led to the extensive study of
mining frequent patterns. Mining data streams poses many new
challenges amongst which are the one-scan nature, the unbounded
memory requirement and the high arrival rate of data streams. In this
paper, we propose a new approach for mining itemsets on data
stream. Our approach SFIDS has been developed based on FIDS
algorithm. The main attempts were to keep some advantages of the
previous approach and resolve some of its drawbacks, and
consequently to improve run time and memory consumption. Our
approach has the following advantages: using a data structure similar
to lattice for keeping frequent itemsets, separating regions from each
other with deleting common nodes that results in a decrease in search
space, memory consumption and run time; and Finally, considering
CPU constraint, with increasing arrival rate of data that result in
overloading system, SFIDS automatically detect this situation and
discard some of unprocessing data. We guarantee that error of results
is bounded to user pre-specified threshold, based on a probability
technique. Final results show that SFIDS algorithm could attain
about 50% run time improvement than FIDS approach.
Abstract: Many difficulties are faced in the process of learning
computer programming. This paper will propose a system framework
intended to reduce cognitive load in learning programming. In first
section focus is given on the process of learning and the
shortcomings of the current approaches to learning programming.
Finally the proposed prototype is suggested along with the
justification of the prototype. In the proposed prototype the concept
map is used as visualization metaphor. Concept maps are similar to
the mental schema in long term memory and hence it can reduce
cognitive load well. In addition other method such as part code
method is also proposed in this framework to can reduce cognitive
load.
Abstract: Managing knowledge of research is one way to ensure
just in time information and knowledge to support research strategist
and activities. Unfortunately researcher found the vital research
knowledge in IHL (Institutions of Higher Learning) are scattered,
unstructured and unorganized. Aiming on lay aside conceptual
foundations for understanding and developing OMS (Organizational
Memory System) to facilitate research in IHL, this research revealed
ten factors contributed to the needs of research in the IHL and seven
internal challenges of IHL in promoting research to their academic
members. This study then suggested a comprehensive support of
managing research knowledge using Organizational Memory System
(OMS). Eight OMS characteristics to support research were
identified. Finally the initial work in designing OMS was projected
using knowledge taxonomy. All analysis is derived from pertinent
research paper related to research in IHL and OMS. Further study can
be conducted to validate and verify results presented.
Abstract: An attractor neural network on the small-world topology
is studied. A learning pattern is presented to the network, then
a stimulus carrying local information is applied to the neurons and
the retrieval of block-like structure is investigated. A synaptic noise
decreases the memory capability. The change of stability from local
to global attractors is shown to depend on the long-range character
of the network connectivity.
Abstract: The Integrated Performance Modelling Environment
(IPME) is a powerful simulation engine for task simulation and
performance analysis. However, it has no high level cognition such
as memory and reasoning for complex simulation. This article
introduces a knowledge representation and reasoning scheme that can
accommodate uncertainty in simulations of military personnel with
IPME. This approach demonstrates how advanced reasoning models
that support similarity-based associative process, rule-based abstract
process, multiple reasoning methods and real-time interaction can be
integrated with conventional task network modelling to provide
greater functionality and flexibility when modelling operator
performance.
Abstract: The increasing interest on processing data created by
sensor networks has evolved into approaches to implement sensor
networks as databases. The aggregation operator, which calculates a
value from a large group of data such as computing averages or sums,
etc. is an essential function that needs to be provided when
implementing such sensor network databases. This work proposes to
add the DURING clause into TinySQL to calculate values during a
specific long period and suggests a way to implement the aggregation
service in sensor networks by applying materialized view and
incremental view maintenance techniques that is used in data
warehouses. In sensor networks, data values are passed from child
nodes to parent nodes and an aggregation value is computed at the root
node. As such root nodes need to be memory efficient and low
powered, it becomes a problem to recompute aggregate values from all
past and current data. Therefore, applying incremental view
maintenance techniques can reduce the memory consumption and
support fast computation of aggregate values.
Abstract: Subdivision is a method to create a smooth surface from a coarse mesh by subdividing the entire mesh. The conventional ways to compute and render surfaces are inconvenient both in terms of memory and computational time as the number of meshes will increase exponentially. An adaptive subdivision is the way to reduce the computational time and memory by subdividing only certain selected areas. In this paper, a new adaptive subdivision method for triangle meshes is introduced. This method defines a new adaptive subdivision rules by considering the properties of each triangle's neighbors and is embedded in a traditional Loop's subdivision. It prevents some undesirable side effects that appear in the conventional adaptive ways. Models that were subdivided by our method are compared with other adaptive subdivision methods