Abstract: Random epistemologies and hash tables have garnered
minimal interest from both security experts and experts in the last
several years. In fact, few information theorists would disagree with
the evaluation of expert systems. In our research, we discover how
flip-flop gates can be applied to the study of superpages. Though
such a hypothesis at first glance seems perverse, it is derived from
known results.
Abstract: In-memory database systems are becoming popular
due to the availability and affordability of sufficiently large RAM and
processors in modern high-end servers with the capacity to manage
large in-memory database transactions. While fast and reliable inmemory
systems are still being developed to overcome cache misses,
CPU/IO bottlenecks and distributed transaction costs, disk-based data
stores still serve as the primary persistence. In addition, with the
recent growth in multi-tenancy cloud applications and associated
security concerns, many organisations consider the trade-offs and
continue to require fast and reliable transaction processing of diskbased
database systems as an available choice. For these
organizations, the only way of increasing throughput is by improving
the performance of disk-based concurrency control. This warrants a
hybrid database system with the ability to selectively apply an
enhanced disk-based data management within the context of inmemory
systems that would help improve overall throughput.
The general view is that in-memory systems substantially
outperform disk-based systems. We question this assumption and
examine how a modified variation of access invariance that we call
enhanced memory access, (EMA) can be used to allow very high
levels of concurrency in the pre-fetching of data in disk-based
systems. We demonstrate how this prefetching in disk-based systems
can yield close to in-memory performance, which paves the way for
improved hybrid database systems. This paper proposes a novel EMA
technique and presents a comparative study between disk-based EMA
systems and in-memory systems running on hardware configurations
of equivalent power in terms of the number of processors and their
speeds. The results of the experiments conducted clearly substantiate
that when used in conjunction with all concurrency control
mechanisms, EMA can increase the throughput of disk-based systems
to levels quite close to those achieved by in-memory system. The
promising results of this work show that enhanced disk-based
systems facilitate in improving hybrid data management within the
broader context of in-memory systems.
Abstract: In this study, epoxy composite specimens reinforced
with multi-walled carbon nanotube filler were fabricated using shear
mixer and ultra-sonication processor. The mechanical and thermal
properties of the fabricated specimens were measured and evaluated.
From the electron microscope images and the results from the
measurements of tensile strengths, the specimens having 0.6 wt%
nanotube content show better dispersion and higher strength than those
of the other specimens. The Young’s moduli of the specimens
increased as the contents of the nanotube filler in the matrix were
increased. The specimen having a 0.6 wt% nanotube filler content
showed higher thermal conductivity than that of the other specimens.
While, in the measurement of thermal expansion, specimens having
0.4 and 0.6 wt% filler contents showed a lower value of thermal
expansion than that of the other specimens. On the basis of the
measured and evaluated properties of the composites, we believe that
the simple and time-saving fabrication process used in this study was
sufficient to obtain improved properties of the specimens.
Abstract: In this paper, we propose a new packing strategy to
find a free resource for run-time mapping of application tasks to
NoC-based Heterogeneous MPSoC. The proposed strategy minimizes
the task mapping time in addition to placing the communicating tasks
close to each other. To evaluate our approach, a comparative study is
carried out for a platform containing single task supported PEs.
Experiments show that our strategy provides better results when
compared to latest dynamic mapping strategies reported in the
literature.
Abstract: With advances in solid-state power electronic devices
and microprocessors, various pulse-width-modulation (PWM)
techniques have been developed for industrial applications. This
paper presents the comparison of two different PWM techniques, the
sinusoidal PWM (SPWM) technique and the space-vector PWM
(SVPWM) technique applied to two level VSI for micro grid
applications. These two methods are compared by discussing their
ease of implementation and by analyzing the output harmonic spectra
of various output voltages (line-to-neutral voltages, and line-to-line
voltages) and their total harmonic distortion (THD). The SVPWM
technique in the under-modulation region can increase the
fundamental output voltage by 15.5% over the SPWM technique.
Abstract: Frequent pattern mining is the process of finding a
pattern (a set of items, subsequences, substructures, etc.) that occurs
frequently in a data set. It was proposed in the context of frequent
itemsets and association rule mining. Frequent pattern mining is used
to find inherent regularities in data. What products were often
purchased together? Its applications include basket data analysis,
cross-marketing, catalog design, sale campaign analysis, Web log
(click stream) analysis, and DNA sequence analysis. However, one of
the bottlenecks of frequent itemset mining is that as the data increase
the amount of time and resources required to mining the data
increases at an exponential rate. In this investigation a new algorithm
is proposed which can be uses as a pre-processor for frequent itemset
mining. FASTER (FeAture SelecTion using Entropy and Rough sets)
is a hybrid pre-processor algorithm which utilizes entropy and roughsets
to carry out record reduction and feature (attribute) selection
respectively. FASTER for frequent itemset mining can produce a
speed up of 3.1 times when compared to original algorithm while
maintaining an accuracy of 71%.
Abstract: The application of today's semiconductor transistors in high power UHF DVB-T linear amplifiers has evolved significantly by utilizing LDMOS technology. This fact provides engineers with the option to design a single transistor signal amplifier which enables output power and linearity that was unobtainable previously using bipolar junction transistors or later type first generation MOSFETS. The quiescent current stability in terms of thermal variations of the LDMOS guarantees a robust operation in any topology of DVB-T signal amplifiers. Otherwise, progressively uncontrolled heat dissipation enhancement on the LDMOS case can degrade the amplifier’s crucial parameters in regards to the gain, linearity and RF stability, resulting in dysfunctional operation or a total destruction of the unit. This paper presents one more sophisticated approach from the traditional biasing circuits used so far in LDMOS DVB-T amplifiers. It utilizes a microprocessor control technology, providing stability in topologies where IDQ must be perfectly accurate.
Abstract: This paper suggests a design methodology for the hardware and software of the electronic control unit (ECU) of safety-critical vehicle applications such as braking and steering. The architecture of the hardware is a high integrity system such thatit incorporates a high performance 32-bit CPU and a separate peripheral controlprocessor (PCP) together with an external watchdog CPU. Communication between the main CPU and the PCP is executed via a common area of RAM and events on either processor which are invoked by interrupts. Safety-related software is also implemented to provide a reliable, self-testing computing environment for safety critical and high integrity applications. The validity of the design approach is shown by using the hardware-in-the-loop simulation (HILS)for electric power steering(EPS) systemswhich consists of the EPS mechanism, the designed ECU, and monitoring tools.
Abstract: Photovoltaic (PV) energy is one of the most important renewable energy sources. Maximum Power Point Tracking (MPPT) techniques should be used in photovoltaic systems to maximize the PV panel output power by tracking continuously the maximum power point which depends on panel’s temperature and on irradiance conditions. Incremental conductance control method has been used as MPPT algorithm. The methodology is based on connecting a pulse width modulated dc/dc SEPIC converter, which is controlled by a microprocessor based unit. The SEPIC converter is one of the buck-boost converters which maintain the output voltage as constant irrespective of the solar isolation level. By adjusting the switching frequency of the converter the maximum power point has been achieved. The main difference between the method used in the proposed MPPT systems and other technique used in the past is that PV array output power is used to directly control the dc/dc converter thus reducing the complexity of the system. The resulting system has high efficiency, low cost and can be easily modified. The tracking capability has been verified experimentally with a 10 W solar panel under a controlled experimental setup. The SEPIC converter and their control strategies has been analyzed and simulated using Simulink/Matlab software.
Abstract: An adder is one of the most integral component of a digital system like a digital signal processor or a microprocessor. Being an extremely computationally intensive part of a system, the optimization for speed and power consumption of the adder is of prime importance. In this paper we have designed a 1 bit full adder cell based on dynamic TSPC logic to achieve high speed operation. A high threshold voltage sleep transistor is used to reduce the static power dissipation in standby mode. The circuit is designed and simulated in TSPICE using TSMC 180nm CMOS process. Average power consumption, delay and power-delay product is measured which showed considerable improvement in performance over the existing full adder designs.
Abstract: Pasta is one of the most widely consumed food products around the world. Rapid determination of the moisture content in pasta will assist food processors to provide online quality control of pasta during large scale production. Rapid Fourier transform near-infrared method (FT-NIR) was developed for determining moisture content in pasta. A calibration set of 150 samples, a validation set of 30 samples and a prediction set of 25 samples of pasta were used. The diffuse reflection spectra of different types of pastas were measured by FT-NIR analyzer in the 4,000-12,000cm-1 spectral range. Calibration and validation sets were designed for the conception and evaluation of the method adequacy in the range of moisture content 10 to 15 percent (w.b) of the pasta. The prediction models based on partial least squares (PLS) regression, were developed in the near-infrared. Conventional criteria such as the R2, the root mean square errors of cross validation (RMSECV), root mean square errors of estimation (RMSEE) as well as the number of PLS factors were considered for the selection of three pre-processing (vector normalization, minimum-maximum normalization and multiplicative scatter correction) methods. Spectra of pasta sample were treated with different mathematic pre-treatments before being used to build models between the spectral information and moisture content. The moisture content in pasta predicted by FT-NIR methods had very good correlation with their values determined via traditional methods (R2 = 0.983), which clearly indicated that FT-NIR methods could be used as an effective tool for rapid determination of moisture content in pasta. The best calibration model was developed with min-max normalization (MMN) spectral pre-processing (R2 = 0.9775). The MMN pre-processing method was found most suitable and the maximum coefficient of determination (R2) value of 0.9875 was obtained for the calibration model developed.
Abstract: This study was carried out to assess rural women’s skill acquisition in the processing of locust bean in Ipokia Local Government Area of Ogun State, Nigeria. Simple random sampling technique was used to select 90 women locust bean processors for this study. Data were analyzed with descriptive statistics and Pearson Product Moment Correlation. The result showed that the mean age of respondents was 40.72 years. Most (70.00%) of the respondents were married. The mean processing experience was 8.63 years. 93.30% of the respondents relied on information from fellow locust beans processors and friends. All (100%) the respondents did not acquire improved processing skill through trainings and workshops. It can be concluded that the rural women’s skill acquisition on modernized processing techniques was generally low. It is hereby recommend that the rural women processors should be trained by extension service providers through series of workshops and seminars on improved processing techniques.
Abstract: Bone Anchored Hearing Implants (BAHI) are
routinely used in patients with conductive or mixed hearing loss, e.g.
if conventional air conduction hearing aids cannot be used. New
sound processors and new fitting software now allow the adjustment
of parameters such as loudness compression ratios or maximum
power output separately. Today it is unclear, how the choice of these
parameters influences aided speech understanding in BAHI users.
In this prospective experimental study, the effect of varying the
compression ratio and lowering the maximum power output in a
BAHI were investigated.
Twelve experienced adult subjects with a mixed hearing loss
participated in this study. Four different compression ratios (1.0; 1.3;
1.6; 2.0) were tested along with two different maximum power output
settings, resulting in a total of eight different programs. Each
participant tested each program during two weeks. A blinded Latin
square design was used to minimize bias.
For each of the eight programs, speech understanding in quiet and
in noise was assessed. For speech in quiet, the Freiburg number test
and the Freiburg monosyllabic word test at 50, 65, and 80 dB SPL
were used. For speech in noise, the Oldenburg sentence test was
administered.
Speech understanding in quiet and in noise was improved
significantly in the aided condition in any program, when compared
to the unaided condition. However, no significant differences were
found between any of the eight programs. In contrast, on a subjective
level there was a significant preference for medium compression
ratios of 1.3 to 1.6 and higher maximum power output.
Abstract: Coordinate Rotation Digital Computer (CORDIC) is a unique digital computing unit intended for the computation of mathematical operations and functions. This paper presents A multi CORDIC processor that integrates different CORDIC architectures on a single FPGA chip and allows the user to select the CORDIC architecture to proceed with based on what he wants to calculate and his needs. Synthesis show that radix 2 CORDIC has the lowest clock delay, radix 8 CORDIC has the highest LUT usage and lowest register usage while Hybrid Radix 4 CORDIC had the highest clock delay.
Abstract: In this paper, getting an high-efficiency parallel algorithm to solve sparse block pentadiagonal linear systems suitable for vectors and parallel processors, stair matrices are used to construct some parallel polynomial approximate inverse preconditioners. These preconditioners are appropriate when the desired target is to maximize parallelism. Moreover, some theoretical results about these preconditioners are presented and how to construct preconditioners effectively for any nonsingular block pentadiagonal H-matrices is also described. In addition, the availability of these preconditioners is illustrated with some numerical experiments arising from two dimensional biharmonic equation.
Abstract: Development of microprocessor controlled sensor for measurement of wind speed and direction is the aim of this study. Electrical circuits and software were developed to the existing electromechanical part of the sensor TM-W2 becoming the properties of so-called smart sensor. The measured data about wind speed (sensitivity 0.01 m/s) and direction (0-360° by step 10°) are transmitted as 16-bit information. The connection between sensor and control unit is realized by radio communication (FM 433 MHz). Transition range is 220 m if used Quad type antenna. This concept provides substitution of actual cable systems by wireless ones.
Abstract: Heterogeneous repolarization causes dispersion of the T-wave and has been linked to arrhythmogenesis. Such heterogeneities appear due to differential expression of ionic currents in different regions of the heart, both in healthy and diseased animals and humans. Mice are important animals for the study of heart diseases because of the ability to create transgenic animals. We used our previously reported model of mouse ventricular myocytes to develop 2D mouse ventricular tissue model consisting of 14,000 cells (apical or septal ventricular myocytes) and to study the stability of action potential propagation and Ca2+ dynamics. The 2D tissue model was implemented as a FORTRAN program code for highperformance multiprocessor computers that runs on 36 processors. Our tissue model is able to simulate heterogeneities not only in action potential repolarization, but also heterogeneities in intracellular Ca2+ transients. The multicellular model reproduced experimentally observed velocities of action potential propagation and demonstrated the importance of incorporation of realistic Ca2+ dynamics for action potential propagation. The simulations show that relatively sharp gradients of repolarization are predicted to exist in 2D mouse tissue models, and they are primarily determined by the cellular properties of ventricular myocytes. Abrupt local gradients of channel expression can cause alternans at longer pacing basic cycle lengths than gradual changes, and development of alternans depends on the site of stimulation.
Abstract: This paper describes the design of new method of
propagation delay measurement in micro and nanostructures during
characterization of ASIC standard library cell. Providing more
accuracy timing information about library cell to the design team we
can improve a quality of timing analysis inside of ASIC design flow
process. Also, this information could be very useful for semiconductor
foundry team to make correction in technology process. By
comparison of the propagation delay in the CMOS element and result
of analog SPICE simulation. It was implemented as digital IP core for
semiconductor manufacturing process. Specialized method helps to
observe the propagation time delay in one element of the standard-cell
library with up-to picoseconds accuracy and less. Thus, the special
useful solutions for VLSI schematic to parameters extraction, basic
cell layout verification, design simulation and verification are
announced.
Abstract: A packet analyzer is a tool for debugging sensor
network systems and is convenient for developers. In this paper, we
introduce a new packet analyzer based on an embedded system. The
proposed packet analyzer is compatible with IEEE 802.15.4, which is
suitable for the wireless communication standard for sensor networks,
and is available for remote control by adopting a server-client scheme
based on the Ethernet interface. To confirm the operations of the
packet analyzer, we have developed two types of sensor nodes based
on PIC4620 and ATmega128L microprocessors and tested the
functions of the proposed packet analyzer by obtaining the packets
from the sensor nodes.
Abstract: This paper presents a case study that uses processoriented
simulation to identify bottlenecks in the service delivery
system in an emergency department of a hospital in the United Arab
Emirates. Using results of the simulation, response surface models
were developed to explain patient waiting time and the total time
patients spend in the hospital system. Results of the study could be
used as a service improvement tool to help hospital management in
improving patient throughput and service quality in the hospital
system.