Abstract: This paper presents the development of an event based Discrete Event Simulation (DES) for a recovery algorithm known Backward Recovery Global Preemptive Utility Accrual Scheduling (BR_GPUAS). This algorithm implements the Backward Recovery (BR) mechanism as a fault recovery solution under the existing Time/Utility Function/ Utility Accrual (TUF/UA) scheduling domain for multiprocessor environment. The BR mechanism attempts to take the faulty tasks back to its initial safe state and then proceeds to re-execute the affected section of the faulty tasks to enable recovery. Considering that faults may occur in the components of any system; a fault tolerance system that can nullify the erroneous effect is necessary to be developed. Current TUF/UA scheduling algorithm uses the abortion recovery mechanism and it simply aborts the erroneous task as their fault recovery solution. None of the existing algorithm in TUF/UA scheduling domain in multiprocessor scheduling environment have considered the transient fault and implement the BR mechanism as a fault recovery mechanism to nullify the erroneous effect and solve the recovery problem in this domain. The developed BR_GPUAS simulator has derived the set of parameter, events and performance metrics according to a detailed analysis of the base model. Simulation results revealed that BR_GPUAS algorithm can saved almost 20-30% of the accumulated utilities making it reliable and efficient for the real-time application in the multiprocessor scheduling environment.
Abstract: The purpose of this research paper is to study and develop a system that is able to help identify problems and improve human rehabilitation after traumatic injuries. Traumatic injuries in human’s lower limbs can occur over a life time and can have serious side effects if they are not treated correctly. In this paper, we developed an intelligent cane (IntelliCane) so as to help individuals in their rehabilitation process and provide feedback to the users. The first stage of the paper involves an analysis of the existing systems on the market and what can be improved. The second stage presents the design of the system. The third part, which is still under development is the validation of the system in real world setups with people in need. This paper presents mainly stages one and two.
Abstract: Mobile localization has attracted a great deal of attention recently due to the introduction of wireless networks. Although several localization algorithms and systems have been implemented and discussed in the literature, very few researchers have exploited the gap that exists between indoor localization, tracking, external storage of location information and outdoor localization for the purpose of digital forensics during and after a disaster. The contribution of this paper lies in the implementation of a robust system that is capable of locating, tracking mobile device users and store location information for both indoor and partially outdoor the cloud. The system can be used during disaster to track and locate mobile phone users. The developed system is a mobile application built based on Android, Hypertext Preprocessor (PHP), Cascading Style Sheets (CSS), JavaScript and MATLAB for the Android mobile users. Using Waterfall model of software development, we have implemented a three level system that is able to track, locate and store mobile device information in secure database (cloud) on almost a real time basis. The outcome of the study showed that the developed system is efficient with regard to the tracking and locating mobile devices. The system is also flexible, i.e. can be used in any building with fewer adjustments. Finally, the system is accurate for both indoor and outdoor in terms of locating and tracking mobile devices.
Abstract: Cloud Computing is a convenient model for on-demand networks that uses shared pools of virtual configurable computing resources, such as servers, networks, storage devices, applications, etc. The cloud serves as an environment for companies and organizations to use infrastructure resources without making any purchases and they can access such resources wherever and whenever they need. Cloud computing is useful to overcome a number of problems in various Information Technology (IT) domains such as Geographical Information Systems (GIS), Scientific Research, e-Governance Systems, Decision Support Systems, ERP, Web Application Development, Mobile Technology, etc. Companies can use Cloud Computing services to store large amounts of data that can be accessed from anywhere on Earth and also at any time. Such services are rented by the client companies where the actual rent depends upon the amount of data stored on the cloud and also the amount of processing power used in a given time period. The resources offered by the cloud service companies are flexible in the sense that the user companies can increase or decrease their storage requirements or the processing power requirements at any time, thus minimizing the overall rental cost of the service they receive. In addition, the Cloud Computing service providers offer fast processors and applications software that can be shared by their clients. This is especially important for small companies with limited budgets which cannot afford to purchase their own expensive hardware and software. This paper is an overview of the Cloud Computing, giving its types, principles, advantages, and disadvantages. In addition, the paper gives some example engineering applications of Cloud Computing and makes suggestions for possible future applications in the field of engineering.
Abstract: Minimizing the response time to asynchronous events in a real-time system is an important factor in increasing the speed of response and an interesting concept in designing equipment fast enough for the most demanding applications. The present article will present the results regarding the validation of the nMPRA (Multi Pipeline Register Architecture) architecture using the FPGA Virtex-7 circuit. The nMPRA concept is a hardware processor with the scheduler implemented at the processor level; this is done without affecting a possible bus communication, as is the case with the other CPU solutions. The implementation of static or dynamic scheduling operations in hardware and the improvement of handling interrupts and events by the real-time executive described in the present article represent a key solution for eliminating the overhead of the operating system functions. The nMPRA processor is capable of executing a preemptive scheduling, using various algorithms without a software scheduler. Therefore, we have also presented various scheduling methods and algorithms used in scheduling the real-time tasks.
Abstract: Power management techniques are necessary to save power in the microprocessor. By changing the frequency and/or operating voltage of processor, DVFS can control power consumption. In this paper, we perform a case study to find optimal power state transition for DVFS. We propose the equation to find the optimal ratio between executions of states while taking into account the deadline of processing time and the power state transition delay overhead. The experiment is performed on the Cortex-M4 processor, and average 6.5% power saving is observed when DVFS is applied under the deadline condition.
Abstract: To accelerate the solution for large scale traveling
salesman problems (TSP), a parallel 2-opt local search algorithm
with simple implementation based on Graphics Processing Unit
(GPU) is presented and tested in this paper. The parallel scheme is
based on technique of data decomposition by dynamically assigning
multiple K processors on the integral tour to treat K edges’ 2-opt
local optimization simultaneously on independent sub-tours, where
K can be user-defined or have a function relationship with input size
N. We implement this algorithm with doubly linked list on GPU.
The implementation only requires O(N) memory. We compare this
parallel 2-opt local optimization against sequential exhaustive 2-opt
search along integral tour on TSP instances from TSPLIB with more
than 10000 cities.
Abstract: This case study responds to the current trends in ICT. Mobile Touch iPads can provide very good assistance to disabled seniors. The intuitive tablet environment, the possibility of the formation environment and its portability, has a very positive effect on the use of particular communication. For comparison, using a conventional PC/notebook, word processor, keyboard and computer mouse compared to the iPad and selected applications. The results of this case study show that the use of mobile touch devices iPad for seniors with mental retardation is a great benefit. These devices do not require high demands on graphomotorics like a standard PC devices.
Abstract: Modern computing technology enters the era of parallel computing with the trend of sustainable and scalable parallelism. Single Instruction Multiple Data (SIMD) is an important way to go along with the trend. It is able to gather more and more computing ability by increasing the number of processor cores without the need of modifying the program. Meanwhile, in the field of scientific computing and engineering design, many computation intensive applications are facing the challenge of increasingly large amount of data. Data parallel computing will be an important way to further improve the performance of these applications. In this paper, we take the accurate collision detection in building information modeling as an example. We demonstrate a model for constructing a data parallel algorithm. According to the model, a complex object is decomposed into the sets of simple objects; collision detection among complex objects is converted into those among simple objects. The resulting algorithm is a typical SIMD algorithm, and its advantages in parallelism and scalability is unparalleled in respect to the traditional algorithms.
Abstract: Many applications use vector operations by applying
single instruction to multiple data that map to different locations
in conventional memory. Transferring data from memory is limited
by access latency and bandwidth affecting the performance gain of
vector processing. We present a memory system that makes all of
its content available to processors in time so that processors need
not to access the memory, we force each location to be available to
all processors at a specific time. The data move in different orbits
to become available to other processors in higher orbits at different
time. We use this memory to apply parallel vector operations to data
streams at first orbit level. Data processed in the first level move
to upper orbit one data element at a time, allowing a processor in
that orbit to apply another vector operation to deal with serial code
limitations inherited in all parallel applications and interleaved it with
lower level vector operations.
Abstract: This paper presents an image analysis algorithm to detect and count yellow tomato flowers in a greenhouse with uneven illumination conditions, complex growth conditions and different flower sizes. The algorithm is designed to be employed on a drone that flies in greenhouses to accomplish several tasks such as pollination and yield estimation. Detecting the flowers can provide useful information for the farmer, such as the number of flowers in a row, and the number of flowers that were pollinated since the last visit to the row. The developed algorithm is designed to handle the real world difficulties in a greenhouse which include varying lighting conditions, shadowing, and occlusion, while considering the computational limitations of the simple processor in the drone. The algorithm identifies flowers using an adaptive global threshold, segmentation over the HSV color space, and morphological cues. The adaptive threshold divides the images into darker and lighter images. Then, segmentation on the hue, saturation and volume is performed accordingly, and classification is done according to size and location of the flowers. 1069 images of greenhouse tomato flowers were acquired in a commercial greenhouse in Israel, using two different RGB Cameras – an LG G4 smartphone and a Canon PowerShot A590. The images were acquired from multiple angles and distances and were sampled manually at various periods along the day to obtain varying lighting conditions. Ground truth was created by manually tagging approximately 25,000 individual flowers in the images. Sensitivity analyses on the acquisition angle of the images, periods throughout the day, different cameras and thresholding types were performed. Precision, recall and their derived F1 score were calculated. Results indicate better performance for the view angle facing the flowers than any other angle. Acquiring images in the afternoon resulted with the best precision and recall results. Applying a global adaptive threshold improved the median F1 score by 3%. Results showed no difference between the two cameras used. Using hue values of 0.12-0.18 in the segmentation process provided the best results in precision and recall, and the best F1 score. The precision and recall average for all the images when using these values was 74% and 75% respectively with an F1 score of 0.73. Further analysis showed a 5% increase in precision and recall when analyzing images acquired in the afternoon and from the front viewpoint.
Abstract: In present era, development of digital circuits, signal processors and other integrated circuits, magnitude comparators are challenged by large area and more power consumption. Comparator is most basic circuit that performs comparison. This paper presents a technique to design a two bit comparator which consumes less area and power. DSCH and MICROWIND version 3 are used to design the schematic and design the layout of the schematic, observe the performance parameters at different nanometer technologies respectively.
Abstract: As semi-conductor manufacturing technology evolves; the single event transient problem becomes more significant issue. Single event transient has a critical impact on both combinational and sequential logic circuits, so it is important to evaluate the soft error tolerance of the circuits at the design stage. In this paper, we present a soft error detecting simulation using scan chain. The simulation model generates a single event transient randomly in the circuit, and detects the soft error during the execution of the test patterns. We verified this model by inserting a scan chain in an 8051 microprocessor using 65 nm CMOS technology. While the test patterns generated by ATPG program are passing through the scan chain, we insert a single event transient and detect the number of soft errors per sub-module. The experiments show that the soft error rates per cell area of the SFR module is 277% larger than other modules.
Abstract: The use of customised soft-core processors in which instructions can be integrated into a system in application hardware is increasing in the Field Programmable Gate Array (FPGA) field. Specifically, the partial run-time reconfiguration of FPGAs in specialised processors for a particular domain can be very beneficial. In this report, the design and implementation for the customisation of a soft-core MIPS processor using an FPGA and partial reconfiguration (PR) of FPGA technology will be addressed to achieve efficient resource use. This can be achieved using a PR design flow that helps the design fit into a smaller device. Moreover, the impact of static power consumption could be reduced due to runtime reconfiguration. This will be done by configurable custom instructions implemented in the hardware as an extension on the MIPS CPU. The aim of this project is to investigate the PR of FPGAs for run-time adaptations of the instruction set of a soft-core CPU, including the integration of custom instructions and the exploration of the potential to use the MultiBoot feature available in Xilinx FPGAs to carry out the PR process. The system will be evaluated and tested on a Nexus 3 development board featuring a Xilinx Spartran-6 FPGA. The system will be able to load reconfigurable custom instructions dynamically into user programs with the help of the trap handler when the custom instruction is called by the MIPS CPU. The results of this experiment demonstrate that custom instructions in hardware can speed up a certain function and many instructions can be saved when compared to a software implementation of the same function. Implementing custom instructions in hardware is perfectly possible and worth exploring.
Abstract: Pulses are high in plant protein and dietary fiber, and contain slowly digestible starches. Innovative products from pulses could increase their consumption and benefit consumer health. This study was conducted to evaluate physicochemical stability of processed cowpea (Vigna unguiculata (L.) Walp. cv. Fradel) and maple pea (Pisum sativum var. arvense L. cv. Bruno) spreads at 5 °C temperature during 62-day storage. Physicochemical stability of pulse spreads was compared after sous vide treatment (80 °C/15 min) and high pressure processing (700 MPa/10 min/20 °C). Pulse spreads were made by homogenizing cooked pulses in a food processor together with salt, citric acid, oil, and bruschetta seasoning. A total of four different pulse spreads were studied: Cowpea spread without and with seasoning, maple pea spread without and with seasoning. Transparent PA/PE and light proof PET/ALU/PA/PP film pouches were used for packaging of pulse spreads under vacuum. The parameters investigated were pH, water activity and mass losses. Pulse spreads were tested on days 0, 15, 29, 42, 50, 57 and 62. The results showed that sous-vide treatment and high pressure processing had an insignificant influence on pH, water activity and mass losses after processing, irrespective of packaging material did not change (p>0.1). pH and water activity of sous-vide treated and high pressure processed pulse spreads in different packaging materials proved to be stable throughout the storage. Mass losses during storage accounted to 0.1% losses. Chosen sous-vide treatment and high pressure processing regimes and packaging materials are suitable to maintain consistent physicochemical quality of the new products during 62-day storage.
Abstract: This paper presents a robust software package for practical advanced analysis of space steel framed structures. The pre- and post-processors of the presented software package are coded in the C++ programming language while the solver is written by using the FORTRAN programming language. A user-friendly graphical interface of the presented software is developed to facilitate the modeling process and result interpretation of the problem. The solver employs the stability functions for capturing the second-order effects to minimize modeling and computational time. Both the plastic-hinge and fiber-hinge beam-column elements are available in the presented software. The generalized displacement control method is adopted to solve the nonlinear equilibrium equations.
Abstract: Wireless sensor networks (WSNs), are constantly in demand to process information more rapidly with less energy and area cost. Presently, processor based solutions have difficult to achieve high processing speed with low-power consumption. This paper presents a simple and accurate data processing scheme for low power wireless sensor node, based on reduced number of processing element (PE). The presented model provides a simple recursive structure (SRS) to process the sampled data in the wireless sensor environment and to reduce the power consumption in wireless sensor node. Based on this model, to process the incoming samples and produce a smaller amount of data sufficient to reconstruct the original signal. The ModelSim simulator used to simulate SRS structure. Functional simulation is carried out for the validation of the presented architecture. Xilinx Power Estimator (XPE) tool is used to measure the power consumption. The experimental results show the average power consumption of 91 mW; this is 42% improvement compared to the folded tree architecture.
Abstract: Local interconnect network (LIN) is a communication protocol that combines sensors, actuators, and processors to a functional module in automotive applications. In this paper, a LIN ver. 2.2A controller was designed in Verilog hardware description language (Verilog HDL) and implemented in field-programmable gate array (FPGA). Its operation was verified by making full-scale LIN network with the presented FPGA-implemented LIN controller, commercial LIN transceivers, and commercial processors. When described in Verilog HDL and synthesized in 0.18 μm technology, its gate size was about 2,300 gates.
Abstract: This paper is a survey of recent works that proposes a baseband processor architecture for software defined radio. A classification of different approaches is proposed. The performance of each architecture is also discussed in order to clarify the suitable approaches that meet software-defined radio constraints.
Abstract: The objective of this study was to assess the production and market of certified organic products in Thailand. A purposive sampling technique was used to identify a sample group of 154 organic entrepreneurs for the study. A survey and in-depth interview were employed for data collection. Also, secondary data from organic agriculture certification body and publications was collected. Then descriptive statistics and content analysis technique were used to describe about production and market of certified organic products in Thailand. Results showed that there were 9,218 farmers on 213,183.68 Rai (83,309.2 acre) of certified organic agriculture land (0.29% of national agriculture land). A total of 57.8% of certified organic agricultural lands were certified by the international certification body. Organic farmers produced around 71,847 tons/year and worth around THB 1,914 million (Euro 47.92 million). Excluding primary producers, 471 operators involved in the Thai organic supply chains, including processors, exporters, distributors, green shops, modern trade shops (supermarket shop), farmer’s markets and food establishments were included. Export market was the major market channel and most of organic products were exported to Europe and North America. The total Thai organic market in 2014 was estimated to be worth around THB 2,331.55 million (Euro 58.22 million), of which, 77.9% was for export and 22.06% was for the domestic market. The largest exports of certified organic products were processed foods (66.1% of total export value), followed by organic rice (30.4%). In the domestic market, modern trade was the largest sale channel, accounting for 59.48% of total domestic sales, followed by green shop (29.47%) and food establishment (5.85%). To become a center of organic farming and trading within ASEAN, the Thai organic sector needs to have more policy support in regard to agricultural chemicals, GMO, and community land title. In addition, appropriate strategies need to be developed.