Abstract: On-chip memories consume a significant portion of the overall die space and power in modern microprocessors. On-chip caches depend on Static Random-Access Memory (SRAM) cells and scaling of technology occurring as per Moore’s law. Unfortunately, the scaling is affecting stability, performance, and leakage power which will become major problems for future SRAMs in aggressive nanoscale technologies due to increasing device mismatch and variations. 3T1D Dynamic Random-Access Memory (DRAM) cell is a non-destructive read DRAM cell with three transistors and a gated diode. In 3T1D DRAM cell gated diode (D1) acts as a storage device and also as an amplifier, which leads to fast read access. Due to its high tolerance to process variation, high density, and low cost of memory as compared to 6T SRAM cell, it is universally used by the advanced microprocessor for on chip data and program memory. In the present paper, it has been shown that 3T1D DRAM cell can perform better in terms of fast read access as compared to 6T, 4T, 3T SRAM cells, respectively.
Abstract: A vertical SOI-based MOSFET with trench body
structure operated as 1T DRAM cell at various temperatures has been
studied and investigated. Different operation temperatures are
assigned for the device for its performance comparison, thus the
thermal stability is carefully evaluated for the future memory device
applications. Based on the simulation, the vertical SOI-based
MOSFET with trench body structure demonstrates the electrical
characteristics properly and possess conspicuous kink effect at
various operation temperatures. Transient characteristics were also
performed to prove that its programming window values and
retention time behaviors are acceptable when the new 1T DRAM cell
is operated at high operation temperature.