Abstract: Virtualization and high performance computing have been discussed from a performance perspective in recent publications. We present and discuss a flexible and efficient approach to the management of virtual clusters. A virtual machine management tool is extended to function as a fabric for cluster deployment and management. We show how features such as saving the state of a running cluster can be used to avoid disruption. We also compare our approach to the traditional methods of cluster deployment and present benchmarks which illustrate the efficiency of our approach.
Abstract: Flash memory has become an important storage device
in many embedded systems because of its high performance, low
power consumption and shock resistance. Multi-level cell (MLC) is
developed as an effective solution for reducing the cost and increasing
the storage density in recent years. However, most of flash file system
cannot handle the error correction sufficiently. To correct more errors
for MLC, we implement Reed-Solomon (RS) code to YAFFS, what is
widely used for flash-based file system. RS code has longer computing
time but the correcting ability is much higher than that of Hamming
code.
Abstract: The Shortest Approximate Common Superstring
(SACS) problem is : Given a set of strings f={w1, w2, ... , wn},
where no wi is an approximate substring of wj, i ≠ j, find a shortest
string Sa, such that, every string of f is an approximate substring of
Sa. When the number of the strings n>2, the SACS problem becomes
NP-complete. In this paper, we present a greedy approximation
SACS algorithm. Our algorithm is a 1/2-approximation for the SACS
problem. It is of complexity O(n2*(l2+log(n))) in computing time,
where n is the number of the strings and l is the length of a string.
Our SACS algorithm is based on computation of the Length of the
Approximate Longest Overlap (LALO).
Abstract: We introduce an extended resource leveling model that abstracts real life projects that consider specific work ranges for each resource. Contrary to traditional resource leveling problems this model considers scarce resources and multiple objectives: the minimization of the project makespan and the leveling of each resource usage over time. We formulate this model as a multiobjective optimization problem and we propose a multiobjective genetic algorithm-based solver to optimize it. This solver consists in a two-stage process: a main stage where we obtain non-dominated solutions for all the objectives, and a postprocessing stage where we seek to specifically improve the resource leveling of these solutions. We propose an intelligent encoding for the solver that allows including domain specific knowledge in the solving mechanism. The chosen encoding proves to be effective to solve leveling problems with scarce resources and multiple objectives. The outcome of the proposed solvers represent optimized trade-offs (alternatives) that can be later evaluated by a decision maker, this multi-solution approach represents an advantage over the traditional single solution approach. We compare the proposed solver with state-of-art resource leveling methods and we report competitive and performing results.
Abstract: In this paper we propose a novel Run Time Interface
(RTI) technique to provide an efficient environment for MPI jobs on
the heterogeneous architecture of PARAM Padma. It suggests an
innovative, unified framework for the job management interface
system in parallel and distributed computing. This approach employs
proxy scheme. The implementation shows that the proposed RTI is
highly scalable and stable. Moreover RTI provides the storage access
for the MPI jobs in various operating system platforms and improve
the data access performance through high performance C-DAC
Parallel File System (C-PFS). The performance of the RTI is
evaluated by using the standard HPC benchmark suites and the
simulation results show that the proposed RTI gives good
performance on large scale supercomputing system.
Abstract: Wireless Sensor Network is Multi hop Self-configuring
Wireless Network consisting of sensor nodes. The deployment of
wireless sensor networks in many application areas, e.g., aggregation
services, requires self-organization of the network nodes into clusters.
Efficient way to enhance the lifetime of the system is to partition the
network into distinct clusters with a high energy node as cluster head.
The different methods of node clustering techniques have appeared in
the literature, and roughly fall into two families; those based on the
construction of a dominating set and those which are based solely on
energy considerations. Energy optimized cluster formation for a set
of randomly scattered wireless sensors is presented. Sensors within a
cluster are expected to be communicating with cluster head only. The
energy constraint and limited computing resources of the sensor nodes
present the major challenges in gathering the data. In this paper we
propose a framework to study how partially correlated data affect the
performance of clustering algorithms. The total energy consumption
and network lifetime can be analyzed by combining random geometry
techniques and rate distortion theory. We also present the relation
between compression distortion and data correlation.
Abstract: Business Process Management (BPM) helps in optimizing the business processes inside an enterprise. But BPM architecture does not provide any help for extending the enterprise. Modern business environments and rapidly changing technologies are asking for brisk changes in the business processes. Service Oriented Architecture (SOA) can help in enabling the success of enterprise-wide BPM. SOA supports agility in software development that is directly related to achieve loose coupling of interacting software agents. Agility is a premium concern of the current software designing architectures. Together, BPM and SOA provide a perfect combination for enterprise computing. SOA provides the capabilities for services to be combined together and to support and create an agile, flexible enterprise. But there are still many questions to answer; BPM is better or SOA? and what is the future track of BPM and SOA? This paper tries to answer some of these important questions.
Abstract: This paper presents the hardware design of a unified
architecture to compute the 4x4, 8x8 and 16x16 efficient twodimensional
(2-D) transform for the HEVC standard. This
architecture is based on fast integer transform algorithms. It is
designed only with adders and shifts in order to reduce the hardware
cost significantly. The goal is to ensure the maximum circuit reuse
during the computing while saving 40% for the number of operations.
The architecture is developed using FIFOs to compute the second
dimension. The proposed hardware was implemented in VHDL. The
VHDL RTL code works at 240 MHZ in an Altera Stratix III FPGA.
The number of cycles in this architecture varies from 33 in 4-point-
2D-DCT to 172 when the 16-point-2D-DCT is computed. Results
show frequency improvements reaching 96% when compared to an
architecture described as the direct transcription of the algorithm.
Abstract: This paper provides an introduction into the
evolution of information and communication technology and illustrates its usage in the work domain. The paper is sub-divided into two parts. The first part gives an overview over the different
phases of information processing in the work domain. It starts by
charting the past and present usage of computers in work
environments and shows current technological trends, which are likely to influence future business applications. The second part
starts by briefly describing, how the usage of computers changed business processes in the past, and presents first Ambient
Intelligence applications based on identification and localization
information, which are already used in the production and retail sector. Based on current systems and prototype applications, the
paper gives an outlook of how Ambient Intelligence technologies could change business processes in the future.
Abstract: Grid environments consist of the volatile integration
of discrete heterogeneous resources. The notion of the Grid is to
unite different users and organisations and pool their resources into
one large computing platform where they can harness, inter-operate,
collaborate and interact. If the Grid Community is to achieve this
objective, then participants (Users and Organisations) need to be
willing to donate or share their resources and permit other
participants to use their resources. Resources do not have to be
shared at all times, since it may result in users not having access to
their own resource. The idea of reward-based computing was
developed to address the sharing problem in a pragmatic manner.
Participants are offered a reward to donate their resources to the
Grid. A reward may include monetary recompense or a pro rata share
of available resources when constrained. This latter point may imply
a quality of service, which in turn may require some globally agreed
reservation mechanism. This paper presents a platform for economybased
computing using the WebCom Grid middleware. Using this
middleware, participants can configure their resources at times and
priority levels to suit their local usage policy. The WebCom system
accounts for processing done on individual participants- resources
and rewards them accordingly.
Abstract: Within the last years, several technologies have been developed to help building e-learning portals. Most of them follow approaches that deliver a vast amount of functionalities, suitable for class-like learning. The SuGI project, as part of the D-Grid (funded by the BMBF), targets on delivering a highly scalable and sustainable learning solution to provide materials (e.g. learning modules, training systems, webcasts, tutorials, etc.) containing knowledge about Grid computing to the D-Grid community. In this article, the process of the development of an e-learning portal focused on the requirements of this special user group is described. Furthermore, it deals with the conceptual and technical design of an e-learning portal, addressing the special needs of heterogeneous target groups. The main focus lies on the quality management of the software development process, Web templates for uploading new contents, the rich search and filter functionalities which will be described from a conceptual as well as a technical point of view. Specifically, it points out best practices as well as concepts to provide a sustainable solution to a relatively unknown and highly heterogeneous community.
Abstract: The paper attempts to contribute to the largely
neglected social and anthropological discussion of technology development on the one hand, and to redirecting the emphasis in
anthropology from primitive and exotic societies to problems of high
relevance in contemporary era and how technology is used in
everyday life. It draws upon multidimensional models of intelligence
and ideal type formation. It is argued that the predominance of
computational and cognitive cosmovisions have led to technology alienation. Injection of communicative competence in artificially
intelligent systems and identity technologies in the coming
information society are analyzed
Abstract: In this paper, a method for matching image segments
using triangle-based (geometrical) regions is proposed. Triangular
regions are formed from triples of vertex points obtained from a
keypoint detector (SIFT). However, triangle regions are subject to
noise and distortion around the edges and vertices (especially acute
angles). Therefore, these triangles are expanded into parallelogramshaped
regions. The extracted image segments inherit an important
triangle property; the invariance to affine distortion. Given two
images, matching corresponding regions is conducted by computing
the relative affine matrix, rectifying one of the regions w.r.t. the other
one, then calculating the similarity between the reference and
rectified region. The experimental tests show the efficiency and
robustness of the proposed algorithm against geometrical distortion.
Abstract: I/O workload is a critical and important factor to
analyze I/O pattern and file system performance. However tracing I/O
operations on the fly distributed parallel file system is non-trivial due
to collection overhead and a large volume of data. In this paper, we
design and implement a parallel file system logging method for high
performance computing using shared memory-based multi-layer
scheme. It minimizes the overhead with reduced logging operation
response time and provides efficient post-processing scheme through
shared memory. Separated logging server can collect sequential logs
from multiple clients in a cluster through packet communication.
Implementation and evaluation result shows low overhead and high
scalability of this architecture for high performance parallel logging
analysis.
Abstract: The visualization of geographic information on mobile devices has become popular as the widespread use of mobile Internet. The mobility of these devices brings about much convenience to people-s life. By the add-on location-based services of the devices, people can have an access to timely information relevant to their tasks. However, visual analysis of geographic data on mobile devices presents several challenges due to the small display and restricted computing resources. These limitations on the screen size and resources may impair the usability aspects of the visualization applications. In this paper, a variable-scale visualization method is proposed to handle the challenge of small mobile display. By merging multiple scales of information into a single image, the viewer is able to focus on the interesting region, while having a good grasp of the surrounding context. This is essentially visualizing the map through a fisheye lens. However, the fisheye lens induces undesirable geometric distortion in the peripheral, which renders the information meaningless. The proposed solution is to apply map generalization that removes excessive information around the peripheral and an automatic smoothing process to correct the distortion while keeping the local topology consistent. The proposed method is applied on both artificial and real geographical data for evaluation.
Abstract: Granular computing deals with representation of information in the form of some aggregates and related methods for transformation and analysis for problem solving. A granulation scheme based on clustering and Rough Set Theory is presented with focus on structured conceptualization of information has been presented in this paper. Experiments for the proposed method on four labeled data exhibit good result with reference to classification problem. The proposed granulation technique is semi-supervised imbibing global as well as local information granulation. To represent the results of the attribute oriented granulation a tree structure is proposed in this paper.
Abstract: Wireless sensor networks (WSN) consists of many
sensor nodes that are placed on unattended environments such as
military sites in order to collect important information.
Implementing a secure protocol that can prevent forwarding forged
data and modifying content of aggregated data and has low delay
and overhead of communication, computing and storage is very
important. This paper presents a new protocol for concealed data
aggregation (CDA). In this protocol, the network is divided to
virtual cells, nodes within each cell produce a shared key to send
and receive of concealed data with each other. Considering to data
aggregation in each cell is locally and implementing a secure
authentication mechanism, data aggregation delay is very low and
producing false data in the network by malicious nodes is not
possible. To evaluate the performance of our proposed protocol, we
have presented computational models that show the performance
and low overhead in our protocol.
Abstract: This work deals with aspects of support vector learning for large-scale data mining tasks. Based on a decomposition algorithm that can be run in serial and parallel mode we introduce a data transformation that allows for the usage of an expensive generalized kernel without additional costs. In order to speed up the decomposition algorithm we analyze the problem of working set selection for large data sets and analyze the influence of the working set sizes onto the scalability of the parallel decomposition scheme. Our modifications and settings lead to improvement of support vector learning performance and thus allow using extensive parameter search methods to optimize classification accuracy.
Abstract: This paper presents an economic game for sybil
detection in a distributed computing environment. Cost parameters
reflecting impacts of different sybil attacks are introduced in the sybil
detection game. The optimal strategies for this game in which both
sybil and non-sybil identities are expected to participate are devised.
A cost sharing economic mechanism called Discriminatory
Rewarding Mechanism for Sybil Detection is proposed based on this
game. A detective accepts a security deposit from each active agent,
negotiates with the agents and offers rewards to the sybils if the latter
disclose their identity. The basic objective of the detective is to
determine the optimum reward amount for each sybil which will
encourage the maximum possible number of sybils to reveal
themselves. Maintaining privacy is an important issue for the
mechanism since the participants involved in the negotiation are
generally reluctant to share their private information. The mechanism
has been applied to Tor by introducing a reputation scoring function.
Abstract: Designing and implementing intelligent systems has become a crucial factor for the innovation and development of better products of space technologies. A neural network is a parallel system, capable of resolving paradigms that linear computing cannot. Field programmable gate array (FPGA) is a digital device that owns reprogrammable properties and robust flexibility. For the neural network based instrument prototype in real time application, conventional specific VLSI neural chip design suffers the limitation in time and cost. With low precision artificial neural network design, FPGAs have higher speed and smaller size for real time application than the VLSI and DSP chips. So, many researchers have made great efforts on the realization of neural network (NN) using FPGA technique. In this paper, an introduction of ANN and FPGA technique are briefly shown. Also, Hardware Description Language (VHDL) code has been proposed to implement ANNs as well as to present simulation results with floating point arithmetic. Synthesis results for ANN controller are developed using Precision RTL. Proposed VHDL implementation creates a flexible, fast method and high degree of parallelism for implementing ANN. The implementation of multi-layer NN using lookup table LUT reduces the resource utilization for implementation and time for execution.