Abstract: This paper proposes a zero-voltage transition (ZVT) PWM synchronous buck converter, which is designed to operate at low output voltage and high efficiency typically required for portable systems. To make the DC-DC converter efficient at lower voltage, synchronous converter is an obvious choice because of lower conduction loss in the diode. The high-side MOSFET is dominated by the switching losses and it is eliminated by the soft switching technique. Additionally, the resonant auxiliary circuit designed is also devoid of the switching losses. The suggested procedure ensures an efficient converter. Theoretical analysis, computer simulation, and experimental results are presented to explain the proposed schemes.
Abstract: This paper presents a practical scheme that can be used for allocating the transmission loss to generators and loads. In this scheme first the share of a generator or load on the current through a branch is determined using Z-bus modified matrix. Then the current components are decomposed and the branch loss allocation is obtained. A motivation of proposed scheme is to improve the results of Z-bus method and to reach more fair allocation. The proposed scheme has been implemented and tested on several networks. To achieve practical and applicable results, the proposed scheme is simulated and compared on the transmission network (400kv) of Khorasan region in Iran and the 14-bus standard IEEE network. The results show that the proposed scheme is comprehensive and fair to allocating the energy losses of a power market to its participants.
Abstract: Conventional approaches in the implementation of logic programming applications on embedded systems are solely of software nature. As a consequence, a compiler is needed that transforms the initial declarative logic program to its equivalent procedural one, to be programmed to the microprocessor. This approach increases the complexity of the final implementation and reduces the overall system's performance. On the contrary, presenting hardware implementations which are only capable of supporting logic programs prevents their use in applications where logic programs need to be intertwined with traditional procedural ones, for a specific application. We exploit HW/SW codesign methods to present a microprocessor, capable of supporting hybrid applications using both programming approaches. We take advantage of the close relationship between attribute grammar (AG) evaluation and knowledge engineering methods to present a programmable hardware parser that performs logic derivations and combine it with an extension of a conventional RISC microprocessor that performs the unification process to report the success or failure of those derivations. The extended RISC microprocessor is still capable of executing conventional procedural programs, thus hybrid applications can be implemented. The presented implementation is programmable, supports the execution of hybrid applications, increases the performance of logic derivations (experimental analysis yields an approximate 1000% increase in performance) and reduces the complexity of the final implemented code. The proposed hardware design is supported by a proposed extended C-language called C-AG.
Abstract: Full adders are important components in applications
such as digital signal processors (DSP) architectures and
microprocessors. In addition to its main task, which is adding two
numbers, it participates in many other useful operations such as
subtraction, multiplication, division,, address calculation,..etc. In
most of these systems the adder lies in the critical path that
determines the overall speed of the system. So enhancing the
performance of the 1-bit full adder cell (the building block of the
adder) is a significant goal.Demands for the low power VLSI have
been pushing the development of aggressive design methodologies to
reduce the power consumption drastically. To meet the growing
demand, we propose a new low power adder cell by sacrificing the
MOS Transistor count that reduces the serious threshold loss
problem, considerably increases the speed and decreases the power
when compared to the static energy recovery full (SERF) adder. So a
new improved 14T CMOS l-bit full adder cell is presented in this
paper. Results show 50% improvement in threshold loss problem,
45% improvement in speed and considerable power consumption
over the SERF adder and other different types of adders with
comparable performance.
Abstract: This paper deals about four items assembly process of
linear drive. This assembly will be realized in flexible assembly cell
on Institute of Manufacturing Systems and Applied Mechanics. There
is defined manufacturing cell, individual actuators created our
flexible cell. Next chapter is about control type, detailed describe a
sequence control type, which will be used in mentioned flexible
assembly cell. All cell control is divided in individual steps
instructions. There instructions illustrate table number III.
Abstract: Since 1992, year where Hugo de Garis has published
the first paper on Evolvable Hardware (EHW), a period of intense
creativity has followed. It has been actively researched, developed
and applied to various problems. Different approaches have been
proposed that created three main classifications: extrinsic, mixtrinsic
and intrinsic EHW. Each of these solutions has a real interest.
Nevertheless, although the extrinsic evolution generates some
excellent results, the intrinsic systems are not so advanced. This
paper suggests 3 possible solutions to implement the run-time
configuration intrinsic EHW system: FPGA-based Run-Time
Configuration system, JBits-based Run-Time Configuration system
and Multi-board functional-level Run-Time Configuration system.
The main characteristic of the proposed architectures is that they are
implemented on Field Programmable Gate Array. A comparison of
proposed solutions demonstrates that multi-board functional-level
run-time configuration is superior in terms of scalability, flexibility
and the implementation easiness.
Abstract: In this work we present some matrix operators named
circulant operators and their action on square matrices. This study on
square matrices provides new insights into the structure of the space
of square matrices. Moreover it can be useful in various fields as in
agents networking on Grid or large-scale distributed self-organizing
grid systems.
Abstract: In this work, a radial basis function (RBF) neural network is developed for the identification of hyperbolic distributed parameter systems (DPSs). This empirical model is based only on process input-output data and used for the estimation of the controlled variables at specific locations, without the need of online solution of partial differential equations (PDEs). The nonlinear model that is obtained is suitably transformed to a nonlinear state space formulation that also takes into account the model mismatch. A stable robust control law is implemented for the attenuation of external disturbances. The proposed identification and control methodology is applied on a long duct, a common component of thermal systems, for a flow based control of temperature distribution. The closed loop performance is significantly improved in comparison to existing control methodologies.
Abstract: The process of wafer fabrication is arguably the most
technologically complex and capital intensive stage in semiconductor
manufacturing. This large-scale discrete-event process is highly reentrant,
and involves hundreds of machines, restrictions, and
processing steps. Therefore, production control of wafer fabrication
facilities (fab), specifically scheduling, is one of the most challenging
problems that this industry faces. Dispatching rules have been
extensively applied to the scheduling problems in semiconductor
manufacturing. Moreover, lot release policies are commonly used in
this manufacturing setting to further improve the performance of such
systems and reduce its inherent variability. In this work, simulation is
used in the scheduling of re-entrant flow shop manufacturing systems
with an application in semiconductor wafer fabrication; where, a
simulation model has been developed for the Intel Five-Machine Six
Step Mini-Fab using the ExtendTM simulation environment. The
Mini-Fab has been selected as it captures the challenges involved in
scheduling the highly re-entrant semiconductor manufacturing lines.
A number of scenarios have been developed and have been used to
evaluate the effect of different dispatching rules and lot release
policies on the selected performance measures. Results of simulation
showed that the performance of the Mini-Fab can be drastically
improved using a combination of dispatching rules and lot release
policy.
Abstract: The modeling of water transfer in the unsaturated zone
uses techniques and methods of the soil physics to solve the
Richards-s equation. However, there is a disaccord between the size
of the measurements provided by the soil physics and the size of the
fields of hydrological modeling problem, to which is added the
strong spatial variability of soil hydraulic properties. The objective of
this work was to develop a methodology to estimate the
hydrodynamic parameters for modeling water transfers at different
hydrological scales in the soil-plant atmosphere systems.
Abstract: We address the problem of joint beamforming and multipath channel parameters estimation in Wideband Code Division Multiple Access (WCDMA) communication systems that employ Multiple-Access Interference (MAI) suppression techniques in the uplink (from mobile to base station). Most of the existing schemes rely on time multiplex a training sequence with the user data. In WCDMA, the channel parameters can also be estimated from a code multiplexed common pilot channel (CPICH) that could be corrupted by strong interference resulting in a bad estimate. In this paper, we present new methods to combine interference suppression together with channel estimation when using multiple receiving antennas by using adaptive signal processing techniques. Computer simulation is used to compare between the proposed methods and the existing conventional estimation techniques.
Abstract: This research work proposes a model of network security systems aiming to prevent production system in a data center from being attacked by intrusions. Conceptually, we introduce a decoy system as a part of the security system for luring intrusions, and apply network intrusion detection (NIDS), coupled with the decoy system to perform intrusion prevention. When NIDS detects an activity of intrusions, it will signal a redirection module to redirect all malicious traffics to attack the decoy system instead, and hence the production system is protected and safe. However, in a normal situation, traffic will be simply forwarded to the production system as usual. Furthermore, we assess the performance of the model with various bandwidths, packet sizes and inter-attack intervals (attacking frequencies).
Abstract: A considerable progress has been achieved in transient
stability analysis (TSA) with various FACTS controllers. But, all
these controllers are associated with single transmission line. This
paper is intended to discuss a new approach i.e. a multi-line FACTS
controller which is interline power flow controller (IPFC) for TSA of
a multi-machine power system network. A mathematical model of
IPFC, termed as power injection model (PIM) presented and this
model is incorporated in Newton-Raphson (NR) power flow
algorithm. Then, the reduced admittance matrix of a multi-machine
power system network for a three phase fault without and with IPFC
is obtained which is required to draw the machine swing curves. A
general approach based on L-index has also been discussed to find
the best location of IPFC to reduce the proximity to instability of a
power system. Numerical results are carried out on two test systems
namely, 6-bus and 11-bus systems. A program in MATLAB has
been written to plot the variation of generator rotor angle and speed
difference curves without and with IPFC for TSA and also a simple
approach has been presented to evaluate critical clearing time for test
systems. The results obtained without and with IPFC are compared
and discussed.
Abstract: Cognitive radio devices have been considered as a key technology for next-generation of wireless communication. These devices in the context of IEEE 802.11 standards and IEEE 802.16 standards, can opportunistically utilize the wireless spectrum to achieve better user performance and improve the overall spectrumutilization efficiency, mainly in the unlicensed 5 GHz bands. However, opportunistic use of wireless spectrum creates news problems such as peaceful coexistence with other wireless technologies, such as the radiolocation systems, as well as understanding the influence of interference that each of these networks can create. In this paper, we suggest a dynamic access model that considerably reduces this interference and allows efficiency and fairness use of the wireless spectrum.
Abstract: Presented herein is an assessment of current nonlinear
static procedures (NSPs) for seismic evaluation of bucklingrestrained
braced frames (BRBFs) which have become a favorable
lateral-force resisting system for earthquake resistant buildings. The
bias and accuracy of modal, improved modal pushover analysis
(MPA, IMPA) and mass proportional pushover (MPP) procedures
are comparatively investigated when they are applied to BRBF
buildings subjected to two sets of strong ground motions. The
assessment is based on a comparison of seismic displacement
demands such as target roof displacements, peak floor/roof
displacements and inter-story drifts. The NSP estimates are compared
to 'exact' results from nonlinear response history analysis (NLRHA).
The response statistics presented show that the MPP
procedure tends to significantly overestimate seismic demands of
lower stories of tall buildings considered in this study while MPA
and IMPA procedures provide reasonably accurate results in
estimating maximum inter-story drift over all stories of studied BRBF
systems.
Abstract: In order to meet the limits imposed on automotive
emissions, engine control systems are required to constrain air/fuel
ratio (AFR) in a narrow band around the stoichiometric value, due to
the strong decay of catalyst efficiency in case of rich or lean mixture.
This paper presents a model of a sample spark ignition engine and
demonstrates Simulink-s capabilities to model an internal combustion
engine from the throttle to the crankshaft output. We used welldefined
physical principles supplemented, where appropriate, with
empirical relationships that describe the system-s dynamic behavior
without introducing unnecessary complexity. We also presents a PID
tuning method that uses an adaptive fuzzy system to model the
relationship between the controller gains and the target output
response, with the response specification set by desired percent
overshoot and settling time. The adaptive fuzzy based input-output
model is then used to tune on-line the PID gains for different
response specifications. Experimental results demonstrate that better
performance can be achieved with adaptive fuzzy tuning relative to
similar alternative control strategies. The actual response
specifications with adaptive fuzzy matched the desired response
specifications.
Abstract: Apparel product development is an important stage in the life cycle of a product. Shortening this stage will help to reduce the costs of a garment. The aim of this study is to examine the production parameters in knitwear apparel companies by defining the unit costs, and developing a software to calculate the unit costs of garments and make the cost estimates. In this study, with the help of a questionnaire, different companies- systems of unit cost estimating and cost calculating were tried to be analyzed. Within the scope of the questionnaire, the importance of cost estimating process for apparel companies and the expectations from a new cost estimating program were investigated. According to the results of the questionnaire, it was seen that the majority of companies which participated to the questionnaire use manual cost calculating methods or simple Microsoft Excel spreadsheets to make cost estimates. Furthermore, it was discovered that many companies meet with difficulties in archiving the cost data for future use and as a solution to that problem, it is thought that prior to making a cost estimate, sub units of garment costs which are fabric, accessory and the labor costs should be analyzed and added to the database of the programme beforehand. Another specification of the cost estimating unit prepared in this study is that the programme was designed to consist of two main units, one of which makes the product specification and the other makes the cost calculation. The programme is prepared as a web-based application in order that the supplier, the manufacturer and the customer can have the opportunity to communicate through the same platform.
Abstract: In order to accommodate various multimedia
services, next generation wireless networks are characterized
by very high transmission bit rates. Thus, in such systems and
networks, the received signal is not only limited by noise but -
especially with increasing symbols rate often more
significantly by the intersymbol interference (ISI) caused by
the time dispersive radio channels such as those are used in
this work. This paper deals with the study of the performance
of detector for high bit rate transmission on some worst case
models of frequency selective fading channels for outdoor
mobile radio environments. This paper deals with a number of
different wireless channels with different power profiles and
different number of resolvable paths. All the radio channels
generated in this paper are for outdoor vehicular environments
with Doppler spread of 100 Hz. A carrier frequency of 1800
MHz is used and all the channels used in this work are such
that they are useful for next generation wireless systems.
Schemes for mitigation of ISI with adaptive equalizers of
different types have been investigated and their performances
have been investigated in terms of BER measured as a function
of SNR.
Abstract: Over the past few years, a number of efforts have
been exerted to build parallel processing systems that utilize the idle
power of LAN-s and PC-s available in many homes and corporations.
The main advantage of these approaches is that they provide cheap
parallel processing environments for those who cannot afford the
expenses of supercomputers and parallel processing hardware.
However, most of the solutions provided are not very flexible in the
use of available resources and very difficult to install and setup.
In this paper, a multi-level web-based parallel processing system
(MWPS) is designed (appendix). MWPS is based on the idea of
volunteer computing, very flexible, easy to setup and easy to use.
MWPS allows three types of subscribers: simple volunteers (single
computers), super volunteers (full networks) and end users. All of
these entities are coordinated transparently through a secure web site.
Volunteer nodes provide the required processing power needed by
the system end users. There is no limit on the number of volunteer
nodes, and accordingly the system can grow indefinitely. Both
volunteer and system users must register and subscribe. Once, they
subscribe, each entity is provided with the appropriate MWPS
components. These components are very easy to install.
Super volunteer nodes are provided with special components that
make it possible to delegate some of the load to their inner nodes.
These inner nodes may also delegate some of the load to some other
lower level inner nodes .... and so on. It is the responsibility of the
parent super nodes to coordinate the delegation process and deliver
the results back to the user.
MWPS uses a simple behavior-based scheduler that takes into
consideration the current load and previous behavior of processing
nodes. Nodes that fulfill their contracts within the expected time get a
high degree of trust. Nodes that fail to satisfy their contract get a
lower degree of trust.
MWPS is based on the .NET framework and provides the minimal
level of security expected in distributed processing environments.
Users and processing nodes are fully authenticated. Communications
and messages between nodes are very secure. The system has been
implemented using C#.
MWPS may be used by any group of people or companies to
establish a parallel processing or grid environment.
Abstract: In this paper, we evaluate the choice of suitable
quantization characteristics for both the decoder messages and the
received samples in Low Density Parity Check (LDPC) coded
systems using M-QAM (Quadrature Amplitude Modulation)
schemes. The analysis involves the demapper block that provides
initial likelihood values for the decoder, by relating its quantization
strategy of the decoder. A mapping strategy refers to the grouping of
bits within a codeword, where each m-bit group is used to select a
2m-ary signal in accordance with the signal labels. Further we
evaluate the system with mapping strategies like Consecutive-Bit
(CB) and Bit-Reliability (BR). A new demapper version, based on
approximate expressions, is also presented to yield a low complexity
hardware implementation.