Abstract: This paper will discuss how we optimize our physical
verification flow in our IC Design Department having various rule
decks from multiple foundries. Our ultimate goal is to achieve faster
time to tape-out and avoid schedule delay. Currently the physical
verification runtimes and memory usage have drastically increased
with the increasing number of design rules, design complexity, and
the size of the chips to be verified. To manage design violations, we
use a number of solutions to reduce the amount of violations needed
to be checked by physical verification engineers. The most important
functions in physical verifications are DRC (design rule check), LVS
(layout vs. schematic), and XRC (extraction). Since we have a
multiple number of foundries for our design tape-outs, we need a
flow that improve the overall turnaround time and ease of use of the
physical verification process. The demand for fast turnaround time is
even more critical since the physical design is the last stage before
sending the layout to the foundries.
Abstract: In the present research work we present the optical
emission studies of the Indium (In) – Tin (Sn) plasma produced by
the first (1064 nm) harmonic of an Nd: YAG nanosecond pulsed
laser. The experimentally observed line profiles of neutral Indium (In
I) and Tin (SnI) are used to extract the electron temperature (Te)
using the Boltzmann plot method. Whereas, the electron number
density (Ne) has been determined from the Stark broadening line
profile method. The Te is calculated by varying the distance from the
target surface along the line of propagation of plasma plume and also
by varying the laser irradiance. Beside we have studied the variation
of Ne as a function of laser irradiance as well as its variation with
distance from the target surface.