Abstract: The stability of a software system is one of the most
important quality attributes affecting the maintenance effort. Many
techniques have been proposed to support the analysis of software
stability at the architecture, file, and class level of software systems,
but little effort has been made for that at the feature (i.e., method and
attribute) level. And the assumptions the existing techniques based
on always do not meet the practice to a certain degree. Considering
that, in this paper, we present a novel metric, Stability of Software
(SoS), to measure the stability of object-oriented software systems
by software change propagation analysis using a simulation way
in software dependency networks at feature level. The approach is
evaluated by case studies on eight open source Java programs using
different software structures (one employs design patterns versus one
does not) for the same object-oriented program. The results of the
case studies validate the effectiveness of the proposed metric. The
approach has been fully automated by a tool written in Java.
Abstract: This paper concerns a formal model to help the
simulation of agent societies where institutional roles and
institutional links can be specified operationally. That is, this paper
concerns institutional roles that can be specified in terms of a minimal behavioral capability that an agent should have in order to
enact that role and, thus, to perform the set of institutional functions that role is responsible for. Correspondingly, the paper concerns
institutional links that can be specified in terms of a minimal
interactional capability that two agents should have in order to, while
enacting the two institutional roles that are linked by that institutional
link, perform for each other the institutional functions supported by
that institutional link. The paper proposes a cognitive architecture
approach to institutional roles and institutional links, that is, an approach in which a institutional role is seen as an abstract cognitive
architecture that should be implemented by any concrete agent (or set of concrete agents) that enacts the institutional role, and in which
institutional links are seen as interactions between the two abstract
cognitive agents that model the two linked institutional roles. We
introduce a cognitive architecture for such purpose, called the
Institutional BCC (IBCC) model, which lifts Yoav Shoham-s BCC
(Beliefs-Capabilities-Commitments) agent architecture to social
contexts. We show how the resulting model can be taken as a means
for a cognitive architecture account of institutional roles and
institutional links of agent societies. Finally, we present an example
of a generic scheme for certain fragments of the social organization
of agent societies, where institutional roles and institutional links are
given in terms of the model.
Abstract: Privacy issues commonly discussed among
researchers, practitioners, and end-users in pervasive healthcare.
Pervasive healthcare systems are applications that can support
patient-s need anytime and anywhere. However, pervasive healthcare
raises privacy concerns since it can lead to situations where patients
may not be aware that their private information is being shared and
becomes vulnerable to threat. We have systematically analyzed the
privacy issues and present a summary in tabular form to show the
relationship among the issues. The six issues identified are medical
information misuse, prescription leakage, medical information
eavesdropping, social implications for the patient, patient difficulties
in managing privacy settings, and lack of support in designing
privacy-sensitive applications. We narrow down the issues and chose
to focus on the issue of 'lack of support in designing privacysensitive
applications' by proposing a privacy-sensitive architecture
specifically designed for pervasive healthcare monitoring systems.
Abstract: We present a novel scheme to evaluate sinusoidal functions with low complexity and high precision using cubic spline interpolation. To this end, two different approaches are proposed to find the interpolating polynomial of sin(x) within the range [- π , π]. The first one deals with only a single data point while the other with two to keep the realization cost as low as possible. An approximation error optimization technique for cubic spline interpolation is introduced next and is shown to increase the interpolator accuracy without increasing complexity of the associated hardware. The architectures for the proposed approaches are also developed, which exhibit flexibility of implementation with low power requirement.
Abstract: Embedded systems need to respect stringent real
time constraints. Various hardware components included in such
systems such as cache memories exhibit variability and therefore
affect execution time. Indeed, a cache memory access from an
embedded microprocessor might result in a cache hit where the
data is available or a cache miss and the data need to be fetched
with an additional delay from an external memory. It is therefore
highly desirable to predict future memory accesses during
execution in order to appropriately prefetch data without incurring
delays. In this paper, we evaluate the potential of several artificial
neural networks for the prediction of instruction memory
addresses. Neural network have the potential to tackle the nonlinear
behavior observed in memory accesses during program
execution and their demonstrated numerous hardware
implementation emphasize this choice over traditional forecasting
techniques for their inclusion in embedded systems. However,
embedded applications execute millions of instructions and
therefore millions of addresses to be predicted. This very
challenging problem of neural network based prediction of large
time series is approached in this paper by evaluating various neural
network architectures based on the recurrent neural network
paradigm with pre-processing based on the Self Organizing Map
(SOM) classification technique.
Abstract: In modern human computer interaction systems
(HCI), emotion recognition is becoming an imperative characteristic.
The quest for effective and reliable emotion recognition in HCI has
resulted in a need for better face detection, feature extraction and
classification. In this paper we present results of feature space analysis
after briefly explaining our fully automatic vision based emotion
recognition method. We demonstrate the compactness of the feature
space and show how the 2d/3d based method achieves superior features
for the purpose of emotion classification. Also it is exposed that
through feature normalization a widely person independent feature
space is created. As a consequence, the classifier architecture has
only a minor influence on the classification result. This is particularly
elucidated with the help of confusion matrices. For this purpose
advanced classification algorithms, such as Support Vector Machines
and Artificial Neural Networks are employed, as well as the simple k-
Nearest Neighbor classifier.
Abstract: Falling has been one of the major concerns and threats
to the independence of the elderly in their daily lives. With the
worldwide significant growth of the aging population, it is essential
to have a promising solution of fall detection which is able to operate
at high accuracy in real-time and supports large scale implementation
using multiple cameras. Field Programmable Gate Array (FPGA) is a
highly promising tool to be used as a hardware accelerator in many
emerging embedded vision based system. Thus, it is the main
objective of this paper to present an FPGA-based solution of visual
based fall detection to meet stringent real-time requirements with
high accuracy. The hardware architecture of visual based fall
detection which utilizes the pixel locality to reduce memory accesses
is proposed. By exploiting the parallel and pipeline architecture of
FPGA, our hardware implementation of visual based fall detection
using FGPA is able to achieve a performance of 60fps for a series of
video analytical functions at VGA resolutions (640x480). The results
of this work show that FPGA has great potentials and impacts in
enabling large scale vision system in the future healthcare industry
due to its flexibility and scalability.
Abstract: There is a real threat on the VIPs personal pages on
the Social Network Sites (SNS). The real threats to these pages is
violation of privacy and theft of identity through creating fake pages
that exploit their names and pictures to attract the victims and spread
of lies. In this paper, we propose a new secure architecture that
improves the trusting and finds an effective solution to reduce fake
pages and possibility of recognizing VIP pages on SNS. The
proposed architecture works as a third party that is added to
Facebook to provide the trust service to personal pages for VIPs.
Through this mechanism, it works to ensure the real identity of the
applicant through the electronic authentication of personal
information by storing this information within content of their
website. As a result, the significance of the proposed architecture is
that it secures and provides trust to the VIPs personal pages.
Furthermore, it can help to discover fake page, protect the privacy,
reduce crimes of personality-theft, and increase the sense of trust and
satisfaction by friends and admirers in interacting with SNS.
Abstract: This paper discusses the applicability of the Data
Distribution Service (DDS) for the development of automated and modular manufacturing systems which require a flexible and robust
communication infrastructure. DDS is an emergent standard for datacentric publish/subscribe middleware systems that provides an
infrastructure for platform-independent many-to-many
communication. It particularly addresses the needs of real-time systems that require deterministic data transfer, have low memory
footprints and high robustness requirements. After an overview of the
standard, several aspects of DDS are related to current challenges for the development of modern manufacturing systems with distributed architectures. Finally, an example application is presented based on a modular active fixturing system to illustrate the described aspects.
Abstract: When architecting an application, key nonfunctional requirements such as performance, scalability, availability and security, which influence the architecture of the system, are some times not adequately addressed. Performance of the application may not be looked at until there is a concern. There are several problems with this reactive approach. If the system does not meet its performance objectives, the application is unlikely to be accepted by the stakeholders. This paper suggests an approach for performance modeling for web based J2EE and .Net applications to address performance issues early in the development life cycle. It also includes a Performance Modeling Case Study, with Proof-of-Concept (PoC) and implementation details for .NET and J2EE platforms.
Abstract: With the proliferation of World Wide Web,
development of web-based technologies and the growth in web
content, the structure of a website becomes more complex and web
navigation becomes a critical issue to both web designers and users.
In this paper we define the content and web pages as two important
and influential factors in website navigation and paraphrase the
enhancement in the website navigation as making some useful
changes in the link structure of the website based on the
aforementioned factors. Then we suggest a new method for
proposing the changes using fuzzy approach to optimize the website
architecture. Applying the proposed method to a real case of Iranian
Civil Aviation Organization (CAO) website, we discuss the results of
the novel approach at the final section.
Abstract: We demonstrate a 40Gbps downstream PON
transmission based on PM-QPSK modulation using commercial DFB
lasers without optical amplifier in the ODN, obtaining 40dB power
budget. We discuss this solution within NG-PON2 architectures.
Abstract: A common way to elude the signature-based Network Intrusion Detection System is based upon changing a recognizable attack to an unrecognizable one via the IDS. For example, in order to evade sign accommodation with intrusion detection system markers, a hacker spilt the payload packet into many small pieces or hides them within messages. In this paper we try to model the main fragmentation attack and create a new module in the intrusion detection architecture system which recognizes the main fragmentation attacks through verification of integrity checking of TCP packet in order to prevent elusion of the system and also to announce the necessary alert to the system administrator.
Abstract: This paper describes an efficient hardware implementation of a new technique for interfacing the data exchange between the microprocessor-based systems and the external devices. This technique, based on the use of software/hardware system and a reduced physical address, enlarges the interfacing capacity of the microprocessor-based systems, uses the Direct Memory Access (DMA) to increases the frequency of the new bus, and improves the speed of data exchange. While using this architecture in microprocessor-based system or in computer, the input of the hardware part of our system will be connected to the bus system, and the output, which is a new bus, will be connected to an external device. The new bus is composed of a data bus, a control bus and an address bus. A Xilinx Integrated Software Environment (ISE) 7.1i has been used for the programmable logic implementation.
Abstract: For high-speed control of robots, a good knowledge of system modelling is necessary to obtain the desired bandwidth. In this paper, we present a cartesian robot with a pan/tilt unit in end-effector (5 dof). This robot is implemented with powerful direct drive AC induction machines. The dynamic model, parameter identification and model validation of the robot are studied (including actuators). This work considers the cartesian robot coupled and non linear (contrary to normal considerations for this type of robots). The mechanical and control architecture proposed in this paper is efficient for industrial and research application in which high speed, well known model and very high accuracy are required.
Abstract: A reduced-bit multiplication algorithm based on the ancient Vedic multiplication formulae is proposed in this paper. Both the Vedic multiplication formulae, Urdhva tiryakbhyam and Nikhilam, are first discussed in detail. Urdhva tiryakbhyam, being a general multiplication formula, is equally applicable to all cases of multiplication. It is applied to the digital arithmetic and is shown to yield a multiplier architecture which is very similar to the popular array multiplier. Due to its structure, it leads to a high carry propagation delay in case of multiplication of large numbers. Nikhilam Sutra, on the other hand, is more efficient in the multiplication of large numbers as it reduces the multiplication of two large numbers to that of two smaller numbers. The framework of the proposed algorithm is taken from this Sutra and is further optimized by use of some general arithmetic operations such as expansion and bit-shifting to take advantage of bit-reduction in multiplication. We illustrate the proposed algorithm by reducing a general 4x4-bit multiplication to a single 2 x 2-bit multiplication operation.
Abstract: European Union candidate status provides a
strong motivation for decision-making in the candidate
countries in shaping the regional development policy where
there is an envisioned transfer of power from center to the
periphery. The process of Europeanization anticipates the
candidate countries configure their regional institutional
templates in the context of the requirements of the European
Union policies and introduces new instruments of incentive
framework of enlargement to be employed in regional
development schemes. It is observed that the contribution of
the local actors to the decision making in the design of the
allocation architectures enhances the efficiency of the funds
and increases the positive effects of the projects funded under
the regional development objectives. This study aims at
exploring the performances of the three regional development
grant schemes in Turkey, established and allocated under the
pre-accession process with a special emphasis given to the
roles of the national and local actors in decision-making for
regional development. Efficiency analyses have been
conducted using the DEA methodology which has proved to
be a superior method in comparative efficiency and
benchmarking measurements. The findings of this study as
parallel to similar international studies, provides that the
participation of the local actors to the decision-making in
funding contributes both to the quality and the efficiency of
the projects funded under the EU schemes.
Abstract: Speedups from mapping four real-life DSP
applications on an embedded system-on-chip that couples coarsegrained
reconfigurable logic with an instruction-set processor are
presented. The reconfigurable logic is realized by a 2-Dimensional
Array of Processing Elements. A design flow for improving
application-s performance is proposed. Critical software parts, called
kernels, are accelerated on the Coarse-Grained Reconfigurable
Array. The kernels are detected by profiling the source code. For
mapping the detected kernels on the reconfigurable logic a prioritybased
mapping algorithm has been developed. Two 4x4 array
architectures, which differ in their interconnection structure among
the Processing Elements, are considered. The experiments for eight
different instances of a generic system show that important overall
application speedups have been reported for the four applications.
The performance improvements range from 1.86 to 3.67, with an
average value of 2.53, compared with an all-software execution.
These speedups are quite close to the maximum theoretical speedups
imposed by Amdahl-s law.
Abstract: Transaction management is one of the most crucial requirements for enterprise application development which often require concurrent access to distributed data shared amongst multiple application / nodes. Transactions guarantee the consistency of data records when multiple users or processes perform concurrent operations. Existing Fault Tolerance Infrastructure for Mobile Agents (FTIMA) provides a fault tolerant behavior in distributed transactions and uses multi-agent system for distributed transaction and processing. In the existing FTIMA architecture, data flows through the network and contains personal, private or confidential information. In banking transactions a minor change in the transaction can cause a great loss to the user. In this paper we have modified FTIMA architecture to ensure that the user request reaches the destination server securely and without any change. We have used triple DES for encryption/ decryption and MD5 algorithm for validity of message.
Abstract: A trend in agent community or enterprises is that they are shifting from closed to open architectures composed of a large number of autonomous agents. One of its implications could be that interface agent framework is getting more important in multi-agent system (MAS); so that systems constructed for different application domains could share a common understanding in human computer interface (HCI) methods, as well as human-agent and agent-agent interfaces. However, interface agent framework usually receives less attention than other aspects of MAS. In this paper, we will propose an interface web agent framework which is based on our former project called WAF and a Distributed HCI template. A group of new functionalities and implications will be discussed, such as web agent presentation, off-line agent reference, reconfigurable activation map of agents, etc. Their enabling techniques and current standards (e.g. existing ontological framework) are also suggested and shown by examples from our own implementation in WAF.