Mapping Complex, Large – Scale Spiking Networks on Neural VLSI
Traditionally, VLSI implementations of spiking
neural nets have featured large neuron counts for fixed computations
or small exploratory, configurable nets. This paper presents the
system architecture of a large configurable neural net system
employing a dedicated mapping algorithm for projecting the targeted
biology-analog nets and dynamics onto the hardware with its
attendant constraints.
[1] T. Morie, M. Nagata, and A. Iwata, "Design of a Pixel-Parallel Feature
Extraction VLSI System for Biologically-Inspired Object Recognition
Methods," Proc. International Symposium on Nonlinear Theory and its
Application NOLTA ÔÇÿ01, pp. 371-374, 2001.
[2] J. Schreiter, U. Ramacher, A. Heittmann, D. Matolin, and R. Sch├╝ffny,
"Cellular pulse coupled neural network with adaptive weights for image
segmentation and its VLSI implementation," in Proc. IS&T/SPIE 16th
International Symposium on Electronic Imaging: Science and
Technology, San Jose (CA), USA, 2004, 5298, pp. 290-296.
[3] G. Indiveri, E. Chicca, and R. Douglas, "A VLSI reconfigurable network
of integrate-and-fire neurons with spike-based learning synapses,"
Proceedings of European Symposium on Artificial Neural Networks
ESANN'2004, pp. 405-410, 2004.
[4] S. Saighi, J. Tomas, Y. Bornat, and S. Renaud, "A conductance-based
silicon neuron with dynamically tunable model parameters,"
Proceedings of Second International IEEE EMBS Conference on Neural
Engineering, pp. 285-288, 2005.
[5] J. Schemmel, K. Meier, and E Mueller, "A New VLSI Model of Neural
Microcircuits Including Spike Time Dependent Plasticity," Proceedings
of the 2004 International Joint Conference on Neural Networks
IJCNN'04, pp. 1711-1716, 2004.
[6] E. M. Izhikevich and N. S. Desai, "Relating STDP to BCM," Neural
Computation, vol. 15, no. 7, pp. 151-1-1523, July 2003.
[7] H. Markram, Y. Wang, and M. Tsodyks, "Differential signaling via the
same axon of neocortical pyramidal neurons," Proc. Natl. Acad. Sci.,
vol. 95, no. 9, pp. 5323-5328, April 1998.
[8] R. Legenstein, C. Näger, and W. Maass, "What can a neuron learn with
spike-timing-dependent plasticity?," Neural Computation, vol. 17, no.
11, pp. 2337-2382, Nov. 2005.
[9] T. Binzegger, R. J. Douglas, and K. A. C. Martin, "A Quantitative Map
of the Circuit of Cat Primary Visual Cortex," The Journal of
Neuroscience, pp. 8441-8453, 2004.
[10] Y.Saad, Iterative Methods for Sparse Linear Systems. Boston MA: PWS
Publishing 1996.
[11] S. Haeusler and W. Maass, "A Statistical Analysis of Information-
Processing Properties of Lamina-Specific Cortical Microcircuit Models,"
in Cerebral Cortex, vol. 17, no. 1, pp. 149-162, 2007.
[12] Y. Chen, Z. Nakao, and X. Fang, "A Parallel Genetic Algorithm Based
on the Island Model for Image Restoration," Proceedings of the 1996
IEEE Signal Processing Society Workshop , pp. 109-118, 1996.
[1] T. Morie, M. Nagata, and A. Iwata, "Design of a Pixel-Parallel Feature
Extraction VLSI System for Biologically-Inspired Object Recognition
Methods," Proc. International Symposium on Nonlinear Theory and its
Application NOLTA ÔÇÿ01, pp. 371-374, 2001.
[2] J. Schreiter, U. Ramacher, A. Heittmann, D. Matolin, and R. Sch├╝ffny,
"Cellular pulse coupled neural network with adaptive weights for image
segmentation and its VLSI implementation," in Proc. IS&T/SPIE 16th
International Symposium on Electronic Imaging: Science and
Technology, San Jose (CA), USA, 2004, 5298, pp. 290-296.
[3] G. Indiveri, E. Chicca, and R. Douglas, "A VLSI reconfigurable network
of integrate-and-fire neurons with spike-based learning synapses,"
Proceedings of European Symposium on Artificial Neural Networks
ESANN'2004, pp. 405-410, 2004.
[4] S. Saighi, J. Tomas, Y. Bornat, and S. Renaud, "A conductance-based
silicon neuron with dynamically tunable model parameters,"
Proceedings of Second International IEEE EMBS Conference on Neural
Engineering, pp. 285-288, 2005.
[5] J. Schemmel, K. Meier, and E Mueller, "A New VLSI Model of Neural
Microcircuits Including Spike Time Dependent Plasticity," Proceedings
of the 2004 International Joint Conference on Neural Networks
IJCNN'04, pp. 1711-1716, 2004.
[6] E. M. Izhikevich and N. S. Desai, "Relating STDP to BCM," Neural
Computation, vol. 15, no. 7, pp. 151-1-1523, July 2003.
[7] H. Markram, Y. Wang, and M. Tsodyks, "Differential signaling via the
same axon of neocortical pyramidal neurons," Proc. Natl. Acad. Sci.,
vol. 95, no. 9, pp. 5323-5328, April 1998.
[8] R. Legenstein, C. Näger, and W. Maass, "What can a neuron learn with
spike-timing-dependent plasticity?," Neural Computation, vol. 17, no.
11, pp. 2337-2382, Nov. 2005.
[9] T. Binzegger, R. J. Douglas, and K. A. C. Martin, "A Quantitative Map
of the Circuit of Cat Primary Visual Cortex," The Journal of
Neuroscience, pp. 8441-8453, 2004.
[10] Y.Saad, Iterative Methods for Sparse Linear Systems. Boston MA: PWS
Publishing 1996.
[11] S. Haeusler and W. Maass, "A Statistical Analysis of Information-
Processing Properties of Lamina-Specific Cortical Microcircuit Models,"
in Cerebral Cortex, vol. 17, no. 1, pp. 149-162, 2007.
[12] Y. Chen, Z. Nakao, and X. Fang, "A Parallel Genetic Algorithm Based
on the Island Model for Image Restoration," Proceedings of the 1996
IEEE Signal Processing Society Workshop , pp. 109-118, 1996.
@article{"International Journal of Information, Control and Computer Sciences:57742", author = "Christian Mayr and Matthias Ehrlich and Stephan Henker and Karsten Wendt and René Schüffny", title = "Mapping Complex, Large – Scale Spiking Networks on Neural VLSI", abstract = "Traditionally, VLSI implementations of spiking
neural nets have featured large neuron counts for fixed computations
or small exploratory, configurable nets. This paper presents the
system architecture of a large configurable neural net system
employing a dedicated mapping algorithm for projecting the targeted
biology-analog nets and dynamics onto the hardware with its
attendant constraints.", keywords = "Large scale VLSI neural net, topology mapping, complex pulse communication.", volume = "1", number = "1", pages = "144-6", }
