Application of Machine Learning Methods to Online Test Error Detection in Semiconductor Test

As in today's semiconductor industries test costs can make up to 50 percent of the total production costs, an efficient test error detection becomes more and more important. In this paper, we present a new machine learning approach to test error detection that should provide a faster recognition of test system faults as well as an improved test error recall. The key idea is to learn a classifier ensemble, detecting typical test error patterns in wafer test results immediately after finishing these tests. Since test error detection has not yet been discussed in the machine learning community, we define central problem-relevant terms and provide an analysis of important domain properties. Finally, we present comparative studies reflecting the failure detection performance of three individual classifiers and three ensemble methods based upon them. As base classifiers we chose a decision tree learner, a support vector machine and a Bayesian network, while the compared ensemble methods were simple and weighted majority vote as well as stacking. For the evaluation, we used cross validation and a specially designed practical simulation. By implementing our approach in a semiconductor test department for the observation of two products, we proofed its practical applicability.





References:
[1] I. A. Grout, Integrated Circuit Test Engineering: Modern Techniques,
1st ed. Springer, 2005.
[2] Y. S. Chang, J. E. Chen, and Y. Y. Chen, "Error classification by wafer
map analysis," Taiwan, 1994.
[3] J. van der Peet and G. van Boxem, "SPC on the IC-Production test
process," Test Conference, International, vol. 0, p. 605, 1996.
[4] H. Shu-guang, Q. Er-shi, and L. Li, "Study on the model of analysis and
control of parallel measurement systems," in Management Science and
Engineering, 2007. ICMSE 2007. International Conference on, 2007,
pp. 633-638.
[5] M. Kirmse, Evaluation hierarchisch eingesetzter, maschineller Lernverfahren
zur automatisierten, fruehzeitigen Erkennung von Testsystemfehlern
beim Wafer-Test. TU Dresden, 2008.
[6] A. Tsymbal, "The problem of concept drift: Definitions and related
work," 2004.
[7] N. Japkowicz, "The class imbalance problem: Significance and strategies,"
in In Proceedings of the 2000 International Conference on
Artificial Intelligence (ICAI, 2000, p. 111117.
[8] M. Dundar, B. Krishnapuram, J. Bi, and R. B. Rao, "Learning classifiers
when the training data is not IID," in Proceedings of the 20th
International Joint Conference on Artificial Intelligence, 2007.
[9] B. E. Goodlin, D. S. Boning, H. H. Sawin, and B. M.
Wise, "Simultaneous fault detection and classification for
semiconductor manufacturing tools," 2002. (Online). Available:
http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.15.8602
[10] B. S. und Alexander J. Smola, Learning with Kernels: Support Vector
Machines, Regularization, Optimization, and Beyond. The MIT Press,
2001.
[11] J. R. Quinlan, C4.5: programs for machine learning.
Morgan Kaufmann Publishers Inc., 1993. (Online). Available:
http://portal.acm.org/citation.cfm?id=152181
[12] G. F. Cooper and E. Herskovits, "A bayesian method for
the induction of probabilistic networks from data," Machine
Learning, vol. 9, no. 4, pp. 309-347, 1992. (Online). Available:
http://dx.doi.org/10.1007/BF00994110
[13] D. H. Wolpert, "Stacked generalization," Neural networks, vol. 5, no. 2,
p. 241259, 1992.
[14] R. Polikar, "Ensemble based systems in decision making," IEEE Circuits
and Systems Magazine, vol. 6, no. 3, p. 2145, 2006.