As chip manufacturing technology is suddenly on the
threshold of major evaluation, which shrinks chip in size and
performance, LFSR (Linear Feedback Shift Register) is implemented
in layout level which develops the low power consumption chip,
using recent CMOS, sub-micrometer layout tools. Thus LFSR
counter can be a new trend setter in cryptography and is also
beneficial as compared to GRAY & BINARY counter and variety of
other applications.
This paper compares 3 architectures in terms of the hardware
implementation, CMOS layout and power consumption, using
Microwind CMOS layout tool. Thus it provides solution to a low
power architecture implementation of LFSR in CMOS VLSI.
[1] A circuits & systems perspective "CMOS VLSI design" by Neil Weste,
Harris & Banerjee.
[2] "Basic CMOS Cell Design" by Etienne Sicard & Sonia Delmas
Bendhia.
[3] "CMOS Digital Integrated Circuits-Analysis and design" by Sung-MO
Kang & Yusuf Leblebici.
[4] "Digital Design-Principles and Practices" by John F. Wakerly.
[5] "Principles &Applications of CMOS Logic" by Neil Weste & Karmran.
[6] James L. Massey, "On the Shift register Synthesis & BCH Decoding",
IEEE Trans. Inform. Theory, vol. IT-15, n. 1, pp. 122-127, Jan 1969.
[7] "LFSR Layout" Advance VLSI Design, Dept of Elect Engg.University
of Houston
[8] A Project report of"4017 CMOS LED CHASERCOUNTER" Layout in
Cadence by Arshdeep Singh, Oscar Servin, Edward Lee, Lutfi Bustami.
[9] A White Paper on "Linear Feedback Shift Registers and Cyclic Codes"
in SAGE Timothy Brian Brock.
[10] A white Paper on "Deterministic Built-in Test Pattern Generation for
High-Performance Circuits Using Twisted- Ring Counters" by
Krishnendu Chakrabarty,Brian T. Murray, and Vikram Iyengar.
[11] Kazuo Yano," Top down pass-Transistor Logic Design," IEEE Journal
of solid-state circuits, vol-31,No-6, june 1996.
[12] Kazuo Yano," A 3.8 CMOS 16 * 16 -b multiplier using complementary
pass-transistor Logic" IEEE Journal of solid-state circuits, vol-25,No-2,
April 1990.
[13] "Micro wind User Manual"
[14] Advanced CMOS Cell Design" by Etienne Sicard, & Sonia Delmas
Bendhia.
[1] A circuits & systems perspective "CMOS VLSI design" by Neil Weste,
Harris & Banerjee.
[2] "Basic CMOS Cell Design" by Etienne Sicard & Sonia Delmas
Bendhia.
[3] "CMOS Digital Integrated Circuits-Analysis and design" by Sung-MO
Kang & Yusuf Leblebici.
[4] "Digital Design-Principles and Practices" by John F. Wakerly.
[5] "Principles &Applications of CMOS Logic" by Neil Weste & Karmran.
[6] James L. Massey, "On the Shift register Synthesis & BCH Decoding",
IEEE Trans. Inform. Theory, vol. IT-15, n. 1, pp. 122-127, Jan 1969.
[7] "LFSR Layout" Advance VLSI Design, Dept of Elect Engg.University
of Houston
[8] A Project report of"4017 CMOS LED CHASERCOUNTER" Layout in
Cadence by Arshdeep Singh, Oscar Servin, Edward Lee, Lutfi Bustami.
[9] A White Paper on "Linear Feedback Shift Registers and Cyclic Codes"
in SAGE Timothy Brian Brock.
[10] A white Paper on "Deterministic Built-in Test Pattern Generation for
High-Performance Circuits Using Twisted- Ring Counters" by
Krishnendu Chakrabarty,Brian T. Murray, and Vikram Iyengar.
[11] Kazuo Yano," Top down pass-Transistor Logic Design," IEEE Journal
of solid-state circuits, vol-31,No-6, june 1996.
[12] Kazuo Yano," A 3.8 CMOS 16 * 16 -b multiplier using complementary
pass-transistor Logic" IEEE Journal of solid-state circuits, vol-25,No-2,
April 1990.
[13] "Micro wind User Manual"
[14] Advanced CMOS Cell Design" by Etienne Sicard, & Sonia Delmas
Bendhia.
@article{"International Journal of Information, Control and Computer Sciences:53573", author = "Doshi N. A. and Dhobale S. B. and Kakade S. R.", title = "LFSR Counter Implementation in CMOS VLSI", abstract = "As chip manufacturing technology is suddenly on the
threshold of major evaluation, which shrinks chip in size and
performance, LFSR (Linear Feedback Shift Register) is implemented
in layout level which develops the low power consumption chip,
using recent CMOS, sub-micrometer layout tools. Thus LFSR
counter can be a new trend setter in cryptography and is also
beneficial as compared to GRAY & BINARY counter and variety of
other applications.
This paper compares 3 architectures in terms of the hardware
implementation, CMOS layout and power consumption, using
Microwind CMOS layout tool. Thus it provides solution to a low
power architecture implementation of LFSR in CMOS VLSI.", keywords = "Chip technology, Layout level, LFSR, Pass transistor", volume = "2", number = "12", pages = "4082-5", }