Improvement in Silicon on Insulator Devices using Strained Si/SiGe Technology for High Performance in RF Integrated Circuits
RF performance of SOI CMOS device has attracted
significant amount of interest recently. In order to improve RF
parameters, Strained Si/Relaxed Si0.8Ge0.2 investigated as a
replacement for Si technology .Enhancement of carrier mobility
associated with strain engineering makes Strained Si a promising
candidate for improving RF performance of CMOS technology.
From the simulation, the cut-off frequency is estimated to be 224
GHZ, whereas in SOI at similar bias is about 188 GHZ. Therefore,
Strained Si exhibits 19% improvement in cut-off frequency over
similar Si counterpart. In this paper, Ion/Ioff ratio is studied as one of
the key parameters in logic and digital application. Strained Si/SiGe
demonstrates better Ion/Ioff characteristic than SOI, in similar channel
length of 100 nm.Another important key analog figures of merit such
as Early Voltage (VEA) ,transconductance vs drain current (gm /Ids)
are studied. They introduce the efficiency of the devices to convert
dc power into ac frequency.
[1] Bongki Mheen, Young-Joo Song, Jin-Young Kang, and Songcheol
Hong ,Strained-SiGe Complementary MOSFETs Adopting Different
Thicknesses of Silicon Cap Layers for Low Power and High
Performance Applications.
[2] Users manual for SILVACO Silvaco International CA, Available at
www.silvaco.com
[3] Mahbub Rashed, W.-K. Shih, S. Jallepalli, T. J. T. Kwan" and C. M.
Maziar,Monte Carlo Simulation of Electron Transport in Strained Si/SilxGex
n-MOSFETs,1995.
[4] Y. Taur and T. H. Ning, Fundamentals of modern VLSI devices, NY:
Cambridge University Press, 1998.
[5] Kranti A,Chung TM,Flandre D,Raskin JP.Laterally asymmetric channel
engineering in fully depleted double.
[1] Bongki Mheen, Young-Joo Song, Jin-Young Kang, and Songcheol
Hong ,Strained-SiGe Complementary MOSFETs Adopting Different
Thicknesses of Silicon Cap Layers for Low Power and High
Performance Applications.
[2] Users manual for SILVACO Silvaco International CA, Available at
www.silvaco.com
[3] Mahbub Rashed, W.-K. Shih, S. Jallepalli, T. J. T. Kwan" and C. M.
Maziar,Monte Carlo Simulation of Electron Transport in Strained Si/SilxGex
n-MOSFETs,1995.
[4] Y. Taur and T. H. Ning, Fundamentals of modern VLSI devices, NY:
Cambridge University Press, 1998.
[5] Kranti A,Chung TM,Flandre D,Raskin JP.Laterally asymmetric channel
engineering in fully depleted double.
@article{"International Journal of Electrical, Electronic and Communication Sciences:56278", author = "Morteza Fathipour and Samira Omidbakhsh and Kimia Khodayari", title = "Improvement in Silicon on Insulator Devices using Strained Si/SiGe Technology for High Performance in RF Integrated Circuits", abstract = "RF performance of SOI CMOS device has attracted
significant amount of interest recently. In order to improve RF
parameters, Strained Si/Relaxed Si0.8Ge0.2 investigated as a
replacement for Si technology .Enhancement of carrier mobility
associated with strain engineering makes Strained Si a promising
candidate for improving RF performance of CMOS technology.
From the simulation, the cut-off frequency is estimated to be 224
GHZ, whereas in SOI at similar bias is about 188 GHZ. Therefore,
Strained Si exhibits 19% improvement in cut-off frequency over
similar Si counterpart. In this paper, Ion/Ioff ratio is studied as one of
the key parameters in logic and digital application. Strained Si/SiGe
demonstrates better Ion/Ioff characteristic than SOI, in similar channel
length of 100 nm.Another important key analog figures of merit such
as Early Voltage (VEA) ,transconductance vs drain current (gm /Ids)
are studied. They introduce the efficiency of the devices to convert
dc power into ac frequency.", keywords = "cut-off frequency, RF application, Silicon oninsulator, Strained Si/SiGe on insulator.", volume = "4", number = "12", pages = "1776-4", }