An Innovational Intermittent Algorithm in Networks-On-Chip (NOC)

Every day human life experiences new equipments more automatic and with more abilities. So the need for faster processors doesn-t seem to finish. Despite new architectures and higher frequencies, a single processor is not adequate for many applications. Parallel processing and networks are previous solutions for this problem. The new solution to put a network of resources on a chip is called NOC (network on a chip). The more usual topology for NOC is mesh topology. There are several routing algorithms suitable for this topology such as XY, fully adaptive, etc. In this paper we have suggested a new algorithm named Intermittent X, Y (IX/Y). We have developed the new algorithm in simulation environment to compare delay and power consumption with elders' algorithms.

Authors:

• Ahmad M. Shafiee
• Mehrdad Montazeri
• Mahdi Nikdast

Keywords:

• Computer architecture
• parallel computing
• NOC
• routing algorithm.

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