Algorithm Design and Performance Evaluation of Equivalent CMOS Model
This work is a proposed model of CMOS for which
the algorithm has been created and then the performance evaluation
of this proposition has been done. In this context, another commonly
used model called ZSTT (Zero Switching Time Transient) model is
chosen to compare all the vital features and the results for the
Proposed Equivalent CMOS are promising. In the end, the excerpts
of the created algorithm are also included
[1] Betty Prince, "Emerging Memories Technologies and Trends", Kluwer
Publications, 2002.
[2] J. F. Scott, "Ferroelectric Memories", Springer Verlag, 2000.
[3] S. L. Miller, J. R. Schwank, R. D. Nasby, and M. S. Rodgers,
"Modeling ferroelectric capacitor switching with asymmetric
nonperiodic input signals and arbitrary initial conditions," J. Appl.
Phys., 70 (5), pp. 2849-2860, 1 Sep. 1991.
[4] B. Jiang, P. Zurcher, R. E. Jones, S. J. Gillespie, and J. C. Lee,
"Computationally efficient Ferroelectric Capacitor model for Circuit
Simulation" , VLSI Technology Symposium , pp. 242 - 245, 1998.
[5] S. M .Yoon & H. Ishiwara, "A Novel FET- Type Ferroelectric Memory
with excellent Data retention Characteristics ", IEDM , December 2000.
[6] Ali Sheikholeslami and P.Glenn Gulak, "Transient Modeling of
Ferroelectric Capacitor for Non-Volatile Memories", IEEE Trans.
Ultrason., Ferroelect., Freq. Contr., vol. 43, pp. 450-456, May 1996.
[7] J. F. Scott , "Ferroelectric memories", Springer Verlag, edition 1st,2000
[8] H. Ishiwara , M. Okuyama , Y.Arimoto , "Ferroelectric Random Access
Memories Fundamental and Application", Springer, 2004.
[9] Ali Sheikholeslami and P.Glenn Gulak, "A Survey of Behavioral
Modeling of Ferroelectric Capacitors", IEEE Transactions on
Ultrasonics, Ferroelectrics, and Frequency Control. Vol. 44, No. 4, pp.
917-924, July 1997.
[10] Ali Sheikholeslami, P. Glenn Gulak, Hideki Takauchi , Hirotaka
Tamura , Hiroshi Yoshioka and Tetsuro Tamura, "Pulse- Based Parallel
Element Macromodel for Ferroelectric Capacitor", IEEE Transactions
on Ultrasonics, Ferroelectrics, and Frequency Control, 47(4), July 2000,
pp. 784-791
[11] H. Ishiwara , "Current Status and Prospects of ferroelectric Memories",
IEDM , December 2001.
[12] Enoch O. Hwang, Enoch, O. Hwang-la Sierra University, "Digital Logic
and Microprocessor Design With VHDL", 1st edition, Nelson
Engineering, 2007.
[13] Volnei A. Pedroni, "Circuit design with VHDL", 1st edition, MIT Press,
2004.
[14] John F. Wakerly, "Digital Design: Principles and Practices", 4th edition,
Prentice Hall Publications, 2005.
[15] Kenneth J. Ayala, "The 8051 Microcontroller Architecture,
Programming, and Applications", Delmar Learning, 2nd edition, 1996.
[16] B. Ram , "Fundamentals of Microprocessors And Microcomputers",
2nd edition, Dhanpat Rai & Sons, 2000.
[17] J. Bhaskar , "A VHDL Primer" , Bell Labs., 3rd edition, 1998.
[1] Betty Prince, "Emerging Memories Technologies and Trends", Kluwer
Publications, 2002.
[2] J. F. Scott, "Ferroelectric Memories", Springer Verlag, 2000.
[3] S. L. Miller, J. R. Schwank, R. D. Nasby, and M. S. Rodgers,
"Modeling ferroelectric capacitor switching with asymmetric
nonperiodic input signals and arbitrary initial conditions," J. Appl.
Phys., 70 (5), pp. 2849-2860, 1 Sep. 1991.
[4] B. Jiang, P. Zurcher, R. E. Jones, S. J. Gillespie, and J. C. Lee,
"Computationally efficient Ferroelectric Capacitor model for Circuit
Simulation" , VLSI Technology Symposium , pp. 242 - 245, 1998.
[5] S. M .Yoon & H. Ishiwara, "A Novel FET- Type Ferroelectric Memory
with excellent Data retention Characteristics ", IEDM , December 2000.
[6] Ali Sheikholeslami and P.Glenn Gulak, "Transient Modeling of
Ferroelectric Capacitor for Non-Volatile Memories", IEEE Trans.
Ultrason., Ferroelect., Freq. Contr., vol. 43, pp. 450-456, May 1996.
[7] J. F. Scott , "Ferroelectric memories", Springer Verlag, edition 1st,2000
[8] H. Ishiwara , M. Okuyama , Y.Arimoto , "Ferroelectric Random Access
Memories Fundamental and Application", Springer, 2004.
[9] Ali Sheikholeslami and P.Glenn Gulak, "A Survey of Behavioral
Modeling of Ferroelectric Capacitors", IEEE Transactions on
Ultrasonics, Ferroelectrics, and Frequency Control. Vol. 44, No. 4, pp.
917-924, July 1997.
[10] Ali Sheikholeslami, P. Glenn Gulak, Hideki Takauchi , Hirotaka
Tamura , Hiroshi Yoshioka and Tetsuro Tamura, "Pulse- Based Parallel
Element Macromodel for Ferroelectric Capacitor", IEEE Transactions
on Ultrasonics, Ferroelectrics, and Frequency Control, 47(4), July 2000,
pp. 784-791
[11] H. Ishiwara , "Current Status and Prospects of ferroelectric Memories",
IEDM , December 2001.
[12] Enoch O. Hwang, Enoch, O. Hwang-la Sierra University, "Digital Logic
and Microprocessor Design With VHDL", 1st edition, Nelson
Engineering, 2007.
[13] Volnei A. Pedroni, "Circuit design with VHDL", 1st edition, MIT Press,
2004.
[14] John F. Wakerly, "Digital Design: Principles and Practices", 4th edition,
Prentice Hall Publications, 2005.
[15] Kenneth J. Ayala, "The 8051 Microcontroller Architecture,
Programming, and Applications", Delmar Learning, 2nd edition, 1996.
[16] B. Ram , "Fundamentals of Microprocessors And Microcomputers",
2nd edition, Dhanpat Rai & Sons, 2000.
[17] J. Bhaskar , "A VHDL Primer" , Bell Labs., 3rd edition, 1998.
@article{"International Journal of Electrical, Electronic and Communication Sciences:63941", author = "Parvinder S. Sandhu and Iqbaldeep Kaur and Amit Verma and Inderpreet Kaur and Birinderjit S. Kalyan", title = "Algorithm Design and Performance Evaluation of Equivalent CMOS Model", abstract = "This work is a proposed model of CMOS for which
the algorithm has been created and then the performance evaluation
of this proposition has been done. In this context, another commonly
used model called ZSTT (Zero Switching Time Transient) model is
chosen to compare all the vital features and the results for the
Proposed Equivalent CMOS are promising. In the end, the excerpts
of the created algorithm are also included", keywords = "Dual Capacitor Model, ZSTT, CMOS, SPICEMacro-Model.", volume = "3", number = "4", pages = "1042-6", }
