Abstract: On-chip memories consume a significant portion of the overall die space and power in modern microprocessors. On-chip caches depend on Static Random-Access Memory (SRAM) cells and scaling of technology occurring as per Moore’s law. Unfortunately, the scaling is affecting stability, performance, and leakage power which will become major problems for future SRAMs in aggressive nanoscale technologies due to increasing device mismatch and variations. 3T1D Dynamic Random-Access Memory (DRAM) cell is a non-destructive read DRAM cell with three transistors and a gated diode. In 3T1D DRAM cell gated diode (D1) acts as a storage device and also as an amplifier, which leads to fast read access. Due to its high tolerance to process variation, high density, and low cost of memory as compared to 6T SRAM cell, it is universally used by the advanced microprocessor for on chip data and program memory. In the present paper, it has been shown that 3T1D DRAM cell can perform better in terms of fast read access as compared to 6T, 4T, 3T SRAM cells, respectively.
Abstract: The focus of this paper is to compare common approaches for Systems of Innovation (SI) and identify proactive alternatives for driving the innovation. Proactive approaches will also consider short and medium term perspectives with developments in the field of Computer Technology and Artificial Intelligence. Concerning Computer Technology and Large Connected Information Systems, it is reasonable to predict that during current or the next century intelligence and innovation will be separated from the constraints of human driven management. After this happens, humans will be no longer driving the innovation and there is possibility that SI for new intelligent systems will set its own targets and exclude humans. Over long time scale these developments could result in scenario, which will lead to the development of larger, cross galactic (universal) proactive SI and Intelligence.