Abstract: This paper presents a thirteen-level asymmetrical
cascaded H-bridge single phase inverter. In this configuration, the
desired output voltage level is achieved by connecting the DC sources in
different combinations by triggering the switches. The modes of
operation are explained well for positive level generations. Moreover, a
comparison is made with conventional topologies of diode clamped,
flying capacitors and cascaded-H-bridge and some recently proposed
topologies to show the significance of the proposed topology in terms of
reduced part counts. The simulation work has been carried out in
MATLAB/Simulink environment. The experimental work is also carried
out for lower rating to verify the performance and feasibility of the
proposed topology. Further the results are presented for different loading
conditions.
Abstract: The multi-level inverters present an important novelty in the field of energy control with high voltage and power. The major advantage of all multi-level inverters is the improvement and spectral quality of its generated output signals. In recent years, various pulse width modulation techniques have been developed. From these technics we have: Sinusoidal Pulse Width Modulation (SPWM) and Space Vector Pulse Width Modulation (SVPWM). This work presents a detailed analysis of the comparative advantage of space vector pulse width modulation (SVPWM) and the standard SPWM technique for Three Level Diode Clamped Inverter fed Induction Motor. The comparison is based on the evaluation of harmonic distortion THD.
Abstract: This paper presents an improved Direct Power Control (DPC) scheme applied to the multilevel inverter that forms a Distributed Generation Unit (DGU). This paper demonstrates the performance of active and reactive power injected by the DGU to the smart grid. The DPC is traditionally operated by the hysteresis controller with the Space Vector Modulation (SVM) which is applied on the 2-level inverters or 3-level inverters. In this paper, the DPC is operated by the PI controller with the Phase-Disposition Pulse Width Modulation (PD-PWM) applied to the 5-level diode clamped inverter. The new combination of the DPC, PI controller, PD-PWM and multilevel inverter proves that its performance is much better than the conventional hysteresis-SVM based DPC. Simulations results have been presented to validate the performance of the suggested control scheme in the grid-connected mode.
Abstract: This paper proposes five level diode clamped Z source
Inverter. The existing PWM techniques used for ZSI are restricted for
two level. The two level Z Source Inverter have high harmonic
distortions which effects the performance of the grid connected PV
system. To improve the performance of the system the number of
voltage levels in the output waveform need to be increased. This
paper presents comparative analysis of a five level diode clamped Z
source Inverter with different carrier based Modified Pulse Width
Modulation techniques. The parameters considered for comparison
are output voltage, voltage gain, voltage stress across switch and total
harmonic distortion when powered by same DC supply. Analytical
results are verified using MATLAB.
Abstract: Multi-Level Inverter technology has been developed in the area of high-power medium-voltage energy scheme, because of their advantages such as devices of lower rating can be used thereby enabling the schemes to be used for high voltage applications. Reduced Total Harmonic Distortion (THD).Since the dv/dt is low; the Electromagnetic Interference from the scheme is low. To avoid the switching losses Lower switching frequencies can be used. In this paper present a survey of various topologies, control strategy and modulation techniques used by these inverters. Here the regenerative and superior topologies are also discussed.
Abstract: This paper presents advances in pulse width modulation techniques which refers to a method of carrying information on train of pulses and the information be encoded in the width of pulses. Pulse Width Modulation is used to control the inverter output voltage. This is done by exercising the control within the inverter itself by adjusting the ON and OFF periods of inverter. By fixing the DC input voltage we get AC output voltage. In variable speed AC motors the AC output voltage from a constant DC voltage is obtained by using inverter. Recent developments in power electronics and semiconductor technology have lead improvements in power electronic systems. Hence, different circuit configurations namely multilevel inverters have became popular and considerable interest by researcher are given on them. A fast space-vector pulse width modulation (SVPWM) method for five-level inverter is also discussed. In this method, the space vector diagram of the five-level inverter is decomposed into six space vector diagrams of three-level inverters. In turn, each of these six space vector diagrams of three-level inverter is decomposed into six space vector diagrams of two-level inverters. After decomposition, all the remaining necessary procedures for the three-level SVPWM are done like conventional two-level inverter. The proposed method reduces the algorithm complexity and the execution time. It can be applied to the multilevel inverters above the five-level also. The experimental setup for three-level diode-clamped inverter is developed using TMS320LF2407 DSP controller and the experimental results are analyzed.
Abstract: Multi-level voltage source inverters offer several
advantages such as; derivation of a refined output voltage with
reduced total harmonic distortion (THD), reduction of voltage ratings
of the power semiconductor switching devices and also the reduced
electro-magnetic-interference problems etc. In this paper, new
carrier-overlapped phase-disposition or sub-harmonic sinusoidal
pulse width modulation (CO-PD-SPWM) and also the carrieroverlapped
phase-disposition space vector modulation (CO-PDSVPWM)
schemes for a six-level diode-clamped inverter topology
are proposed. The principle of the proposed PWM schemes is similar
to the conventional PD-PWM with a little deviation from it in the
sense that the triangular carriers are all overlapped. The overlapping
of the triangular carriers on one hand results in an increased number
of switchings, on the other hand this facilitates an improved spectral
performance of the output voltage. It is demonstrated through
simulation studies that the six-level diode-clamped inverter with the
use of CO-PD-SPWM and CO-PD-SVPWM proposed in this paper is
capable of generating multiple levels in its output voltage. The
advantages of the proposed PWM schemes can be derived to benefit,
especially at lower modulation indices of the inverter and hence this
aspect of the proposed PWM schemes can be well exploited in high
power applications requiring low speeds of operation of the drive.