Modification of Electrical and Switching Characteristics of a Non Punch-Through Insulated Gate Bipolar Transistor by Gamma Irradiation

Fast neutron irradiation using nuclear reactors is an effective method to improve switching loss and short circuit durability of power semiconductor (insulated gate bipolar transistors (IGBT) and insulated gate transistors (IGT), etc.). However, not only fast neutrons but also thermal neutrons, epithermal neutrons and gamma exist in the nuclear reactor. And the electrical properties of the IGBT may be deteriorated by the irradiation of gamma. Gamma irradiation damages are known to be caused by Total Ionizing Dose (TID) effect and Single Event Effect (SEE), Displacement Damage. Especially, the TID effect deteriorated the electrical properties such as leakage current and threshold voltage of a power semiconductor. This work can confirm the effect of the gamma irradiation on the electrical properties of 600 V NPT-IGBT. Irradiation of gamma forms lattice defects in the gate oxide and Si-SiO2 interface of the IGBT. It was confirmed that this lattice defect acts on the center of the trap and affects the threshold voltage, thereby negatively shifted the threshold voltage according to TID. In addition to the change in the carrier mobility, the conductivity modulation decreases in the n-drift region, indicating a negative influence that the forward voltage drop decreases. The turn-off delay time of the device before irradiation was 212 ns. Those of 2.5, 10, 30, 70 and 100 kRad(Si) were 225, 258, 311, 328, and 350 ns, respectively. The gamma irradiation increased the turn-off delay time of the IGBT by approximately 65%, and the switching characteristics deteriorated.

Analytical Subthreshold Drain Current Model Incorporating Inversion Layer Effective Mobility Model for Pocket Implanted Nano Scale n-MOSFET

Carrier scatterings in the inversion channel of MOSFET dominates the carrier mobility and hence drain current. This paper presents an analytical model of the subthreshold drain current incorporating the effective electron mobility model of the pocket implanted nano scale n-MOSFET. The model is developed by assuming two linear pocket profiles at the source and drain edges at the surface and by using the conventional drift-diffusion equation. Effective electron mobility model includes three scattering mechanisms, such as, Coulomb, phonon and surface roughness scatterings as well as ballistic phenomena in the pocket implanted n-MOSFET. The model is simulated for various pocket profile and device parameters as well as for various bias conditions. Simulation results show that the subthreshold drain current data matches the experimental data already published in the literature.

Effects of Double Delta Doping on Millimeter and Sub-millimeter Wave Response of Two-Dimensional Hot Electrons in GaAs Nanostructures

Carrier mobility has become the most important characteristic of high speed low dimensional devices. Due to development of very fast switching semiconductor devices, speed of computer and communication equipment has been increasing day by day and will continue to do so in future. As the response of any device depends on the carrier motion within the devices, extensive studies of carrier mobility in the devices has been established essential for the growth in the field of low dimensional devices. Small-signal ac transport of degenerate two-dimensional hot electrons in GaAs quantum wells is studied here incorporating deformation potential acoustic, polar optic and ionized impurity scattering in the framework of heated drifted Fermi-Dirac carrier distribution. Delta doping is considered in the calculations to investigate the effects of double delta doping on millimeter and submillimeter wave response of two dimensional hot electrons in GaAs nanostructures. The inclusion of delta doping is found to enhance considerably the two dimensional electron density which in turn improves the carrier mobility (both ac and dc) values in the GaAs quantum wells thereby providing scope of getting higher speed devices in future.

Improvement in Silicon on Insulator Devices using Strained Si/SiGe Technology for High Performance in RF Integrated Circuits

RF performance of SOI CMOS device has attracted significant amount of interest recently. In order to improve RF parameters, Strained Si/Relaxed Si0.8Ge0.2 investigated as a replacement for Si technology .Enhancement of carrier mobility associated with strain engineering makes Strained Si a promising candidate for improving RF performance of CMOS technology. From the simulation, the cut-off frequency is estimated to be 224 GHZ, whereas in SOI at similar bias is about 188 GHZ. Therefore, Strained Si exhibits 19% improvement in cut-off frequency over similar Si counterpart. In this paper, Ion/Ioff ratio is studied as one of the key parameters in logic and digital application. Strained Si/SiGe demonstrates better Ion/Ioff characteristic than SOI, in similar channel length of 100 nm.Another important key analog figures of merit such as Early Voltage (VEA) ,transconductance vs drain current (gm /Ids) are studied. They introduce the efficiency of the devices to convert dc power into ac frequency.