Abstract: This paper describes I²C Slave implementation using
I²C master obtained from the OpenCores website. This website
provides free Verilog and VHDL Codes to users. The design
implementation for the I²C slave is in Verilog Language and uses
EDA tools for ASIC design known as ModelSim from Mentor
Graphic. This tool is used for simulation and verification purposes.
Common application for this I²C Master-Slave integration is also
included. This paper also addresses the advantages and limitations of
the said design.
Abstract: Home Energy Management System (HEMS), which makes the residential consumers, contribute to the demand response is attracting attention in recent years. An aim of HEMS is to minimize their electricity cost by controlling the use of their appliances according to electricity price. The use of appliances in HEMS may be affected by some conditions such as external temperature and electricity price. Therefore, the user’s usage pattern of appliances should be modeled according to the external conditions, and the resultant usage pattern is related to the user’s comfortability on use of each appliances. This paper proposes a methodology to model the usage pattern based on the historical data with the copula function. Through copula function, the usage range of each appliance can be obtained and is able to satisfy the appropriate user’s comfort according to the external conditions for next day. Within the usage range, an optimal scheduling for appliances would be conducted so as to minimize an electricity cost with considering user’s comfort. Among the home appliance, electric heater (EH) is a representative appliance, which is affected by the external temperature. In this paper, an optimal scheduling algorithm for an electric heater (EH) is addressed based on the method of branch and bound. As a result, scenarios for the EH usage are obtained according to user’s comfort levels and then the residential consumer would select the best scenario. The case study shows the effects of the proposed algorithm compared with the traditional operation of the EH, and it represents impacts of the comfort level on the scheduling result.
Abstract: Current transformers are an integral part of power
system because it provides a proportional safe amount of current for
protection and measurement applications. However, when the power
system experiences an abnormal situation leading to huge current
flow, then this huge current is proportionally injected to the
protection and metering circuit. Since the protection and metering
equipment’s are designed to withstand only certain amount of current
with respect to time, these high currents pose a risk to man and
equipment. Therefore, during such instances, the CT saturation
characteristics have a huge influence on the safety of both man and
equipment and on the reliability of the protection and metering
system. This paper shows the effect of burden on the Accuracy Limiting
factor/ Instrument security factor of current transformers and the
change in saturation characteristics of the CT’s. The response of the
CT to varying levels of overcurrent at different connected burden will
be captured using the data acquisition software LabVIEW. Analysis
is done on the real time data gathered using LabVIEW. Variation of
current transformer saturation characteristics with changes in burden
will be discussed.
Abstract: Measuring the Electrocardiogram (ECG) signal is an
essential process for the diagnosis of the heart diseases. The ECG
signal has the information of the degree of how much the heart
performs its functions. In medical diagnosis and treatment systems,
Decision Support Systems processing the ECG signal are being
developed for the use of clinicians while medical examination. In this
study, a modular wireless ECG (WECG) measuring and recording
system using a single board computer and e-Health sensor platform
is developed. In this designed modular system, after the ECG signal
is taken from the body surface by the electrodes first, it is filtered and
converted to digital form. Then, it is recorded to the health database
using Wi-Fi communication technology. The real time access of the
ECG data is provided through the internet utilizing the developed
web interface.
Abstract: This paper will discuss how we optimize our physical
verification flow in our IC Design Department having various rule
decks from multiple foundries. Our ultimate goal is to achieve faster
time to tape-out and avoid schedule delay. Currently the physical
verification runtimes and memory usage have drastically increased
with the increasing number of design rules, design complexity, and
the size of the chips to be verified. To manage design violations, we
use a number of solutions to reduce the amount of violations needed
to be checked by physical verification engineers. The most important
functions in physical verifications are DRC (design rule check), LVS
(layout vs. schematic), and XRC (extraction). Since we have a
multiple number of foundries for our design tape-outs, we need a
flow that improve the overall turnaround time and ease of use of the
physical verification process. The demand for fast turnaround time is
even more critical since the physical design is the last stage before
sending the layout to the foundries.