Influence of Paralleled Capacitance Effect in Well-defined Multiple Value Logical Level System with Active Load

Three similar negative differential resistance (NDR) profiles with both high peak to valley current density ratio (PVCDR) value and high peak current density (PCD) value in unity resonant tunneling electronic circuit (RTEC) element is developed in this paper. The PCD values and valley current density (VCD) values of the three NDR curves are all about 3.5 A and 0.8 A, respectively. All PV values of NDR curves are 0.40 V, 0.82 V, and 1.35 V, respectively. The VV values are 0.61 V, 1.07 V, and 1.69 V, respectively. All PVCDR values reach about 4.4 in three NDR curves. The PCD value of 3.5 A in triple PVCDR RTEC element is better than other resonant tunneling devices (RTD) elements. The high PVCDR value is concluded the lower VCD value about 0.8 A. The low VCD value is achieved by suitable selection of resistors in triple PVCDR RTEC element. The low PV value less than 1.35 V possesses low power dispersion in triple PVCDR RTEC element. The designed multiple value logical level (MVLL) system using triple PVCDR RTEC element provides equidistant logical level. The logical levels of MVLL system are about 0.2 V, 0.8 V, 1.5 V, and 2.2 V from low voltage to high voltage and then 2.2 V, 1.3 V, 0.8 V, and 0.2 V from high voltage back to low voltage in half cycle of sinusoid wave. The output level of four levels MVLL system is represented in 0.3 V, 1.1 V, 1.7 V, and 2.6 V, which satisfies the NMP condition of traditional two-bit system. The remarkable logical characteristic of improved MVLL system with paralleled capacitor are with four significant stable logical levels about 220 mV, 223 mV, 228 mV, and 230 mV. The stability and articulation of logical levels of improved MVLL system are outstanding. The average holding time of improved MVLL system is approximately 0.14 μs. The holding time of improved MVLL system is fourfold than of basic MVLL system. The function of additional capacitor in the improved MVLL system is successfully discovered.

Authors:

• Chih Chin Yang
• Yen Chun Lin
• Hsiao Hsuan Cheng

Keywords:

• Capacitance
• Logical level
• Constant current source

References:

[1] O. T. Hanyu and M. Kameyama, "A 200 MHz pipelined multiplier using
1.5 V-supply multiple-valued MOS current-mode circuits with dual-rail
source-coupled logic," IEEE Journal of Solid-State Circuits, vol. 30(11),
pp.1239-1245, Nov. 1995. Pages:1239 - 1245
[2] N. Jin; S. Y. Chung, R. M. Heyns, P. R. Berger, Y. Ronghua, P. E.
Thompson, and S. L. Rommel, "Tri-state logic using vertically integrated
Si-SiGe resonant interband tunneling diodes with double NDR," IEEE
Electron Device Letters, vol. 25(9), pp. 646-648, Sept. 2004.
[3] R. Versari, D. Esseni, G. Falavigna, M. Lanzoni, and B.
Ricco,"Optimized programming of multilevel flash EEPROMs," IEEE
Transactions on Electron Devices, vol. 48(8), pp.1641-1646, Aug. 2001.
[4] T. Temel and A. Morgul, "Implementation of multi-valued logic,
simultaneous literal operations with full CMOS current-mode threshold
circuits," Electronics Letters, vol. 38(4), pp. 160-161, Feb 2002.
[5] S. J. Piestrak and A. Dandache, "Minimal test set for multi-output
threshold circuits implemented as bubble sorting networks," Electronics
Letters, vol. 36(3), pp.202-204, Feb. 2000.
[6] A. C. Seabaugh, E. A. Beam, A. H. Taddiken, J. N. Randall, and Y. C.
Kao, "Co-integration of resonant tunneling and double heterojunction
bipolar transistors on InP," IEEE Electron Device Letters, vol. 14(10) , pp.
472-474, Oct. 1993.
[7] K. J. Chen, K. Maezawa, and M. Yamamoto, "InP-based
high-performance monostable-bistable transition logic elements
(MOBILEs) using integrated multiple-input resonant-tunneling devices,"
IEEE Electron Device Letters, vol. 17 (3), pp. 127-129, March 1996.
[8] K. J. Gan and Y. K. Su, "Novel multipeak current-voltage characteristics
of series-connected negative differential resistance devices," IEEE
Electron Device Letters, vol.19 (4), pp.109-111, April 1998.
[9] W. C. Liu, L. W. Laih, S. Y. Cheng, W. L. Chang, W. C. Wang, J. Y.
Chen, and P. H. Lin,"Multiple negative-differential-resistance (MNDR)
phenomena of a metal-insulator-semiconductor-insulator-metal
(MISIM)-like structure with step-compositioned InxGa1-xAs quantum
wells," IEEE Transactions on Electron Devices, vol. 45(2), pp.373-379,
Feb. 1998.
[10] S. Villareal, M. Weichold, and J. Pineda, "Simulation study of compact
quantising circuits using multiple-resonant tunnelling transistors,"
Electronics Letters, vol. 34(2), pp.161-162, Jan. 1998.
[11] J. L. Huber, J. Chen, J. A. McCormack, C. W. Zhou, and M. A. Reed,"An
RTD/transistor switching block and its possible application in binary and
ternary adders," IEEE Transactions on Electron Devices, vol. 44(12),
pp.2149-2153, Dec. 1997.
[12] W. C. Liu, W. S. Lour, and Y. H. Wang, "Investigation of AlGaAs/GaAs
superlattice-emitter resonant tunneling bipolar transistor (SE-RTBT),"
IEEE Transactions on Electron Devices, vol. 39(10), pp.2214-2219,Oct.
1992.
[13] W. C. Liu, W. C. Wang, H. J. Pan, J. Y. Chen, S.Y. Cheng, K. W. Lin, K.
H. Yu, K. B. Thei, and C. C. Cheng,"Multiple-route and multiple-state
current-voltage characteristics of an InP/AlInGaAs switch for
multiple-valued logic applications," IEEE Transactions on Electron
Devices, vol. 47(8), pp.1553-1559, Aug. 2000.
[14] J. J. Blakley, "Architecture for hardware implementation of
programmable ternary de Bruijn sequence generators," Electronics
Letters, vol. 34(25), pp. 2389-2390, Dec. 1998.
[15] F. Toto and R. Saletti, "CMOS dynamic ternary circuit with full logic
swing and zero-static power consumption," Electronics Letters, vol.
34(11), pp. 1083-1084, May 1998.
[16] C. C. Yang, "High Performance Multiple Stepped Quantum Well
Resonant Microwave Devices", Electronics Letters, Vol. 42(25),
pp.1485-1487, December, 2006.
[17] C. C. Yang and Yan Kuin Su,"Well-defined electrical properties
high-strain resonant interband tunneling structure",Microelectronics
Journal, vol.39(1), pp.67-69, January, 2008.
[18] C. C. Yang and Yan Kuin Su," High Performance Aluminum Arsenic
Intraband Resonant Microwave Devices", Microelectronics Journal,
vol.39(1), pp.90-93, January, 2008.
[19] C. C. Yang," Frequency Computation of Resonant Signal in Resonant
Tunneling Circuit for Communication," 2010 Second International Joint
Journal Conference on Computer and Communication Technology
(IJJCCT 2010), Jeju Island, Korea 27-28 December 2010.