A Comparison Study of Electrical Characteristics in Conventional Multiple-gate Silicon Nanowire Transistors
In this paper electrical characteristics of various kinds
of multiple-gate silicon nanowire transistors (SNWT) with the
channel length equal to 7 nm are compared. A fully ballistic quantum
mechanical transport approach based on NEGF was employed to
analyses electrical characteristics of rectangular and cylindrical
silicon nanowire transistors as well as a Double gate MOS FET. A
double gate, triple gate, and gate all around nano wires were studied
to investigate the impact of increasing the number of gates on the
control of the short channel effect which is important in nanoscale
devices. Also in the case of triple gate rectangular SNWT inserting
extra gates on the bottom of device can improve the application of
device. The results indicate that by using gate all around structures
short channel effects such as DIBL, subthreshold swing and delay
reduces.
[1] J. Wang, E. Polizzi and M. Lundstrom, "A computational study of
ballistic silicon nanowire transistors," IEEE International Electron Dev.
Meeting (IEDM), Tech.Digest, pp. 695-698, Dec. 8-10 2003.
[2] J.Saint-Martin, A.Bournel, Philippe, "Comparison of multiple-gate
MOSFET architectures using Monte Carlo simulation,"Dollfus Institut
d'Electronique Fondamentale, UMR CNRS 8622, Université Paris Sud,
Bât. 220,F-91405 Orsay cedex, France.
[3] NANOTCAD ViDES User-s Manual by G. Fiori and G. Iannaccone
Copyright c 2004-2008, Gianluca Fiori, Giuseppe Iannaccone,
University of Pisa. www.NANOTCADVIDES.
[4] Silvaco International, Atlas User-s Manual, 2008.
[5] J.Wang, E. Polizzi, and M. Lundstrom IEDM Tech. Dig., 2003, pp.
29.5.1-29.5.4
[6] J.Wang, E. Polizzi, M. Lundstrom, A three-dimensional quantum
simulation of silicon nanowire transistors with the effective-mass
approximation,J. Appl. Phys. 96 (2004) 2192-2203.
[7] G. Fiori, and G. Iannaccone" Three-Dimensional Simulation of One-
Dimensional Transport in Silicon Nanowire Transistors" IEEE
TRANSACTIONS ON NANOTECHNOLOGY, VOL. 6, NO. 5,
SEPTEMBER 2007.
[8] R. Martel, T. Schmidt, H. R. Shea, T. Hertel, and P. Avouris, Appl.
Phys. Lett. 73, 2447 ~1998.
[9] A. Rahman, M. Lundstrom and A. W. Ghosh, "Generalized effectivemass
approach for n-type metal-oxide-semiconductor field-effect
transistors on arbitrary oriented wafers," J. Appl. Phys., vol. 97, pp.
053702.1-053702.12, Mar. 2005.
[10] R. Venugopal et al., "Simulating quantum transport in Nanoscale
transistors: Real versus mode-space approaches," J. App. Phys.,92, 3730
(2002).
[11] S. H. Zaidi, A. K. Sharma, R. Marquardt, S. L. Lucero and P. M.
Varangis, "Multiple nanowire field-effect transistors," Proc of the 2001
1st IEEE Conference on Nanotechnology, pp. 189-194, Oct. 2001.
[1] J. Wang, E. Polizzi and M. Lundstrom, "A computational study of
ballistic silicon nanowire transistors," IEEE International Electron Dev.
Meeting (IEDM), Tech.Digest, pp. 695-698, Dec. 8-10 2003.
[2] J.Saint-Martin, A.Bournel, Philippe, "Comparison of multiple-gate
MOSFET architectures using Monte Carlo simulation,"Dollfus Institut
d'Electronique Fondamentale, UMR CNRS 8622, Université Paris Sud,
Bât. 220,F-91405 Orsay cedex, France.
[3] NANOTCAD ViDES User-s Manual by G. Fiori and G. Iannaccone
Copyright c 2004-2008, Gianluca Fiori, Giuseppe Iannaccone,
University of Pisa. www.NANOTCADVIDES.
[4] Silvaco International, Atlas User-s Manual, 2008.
[5] J.Wang, E. Polizzi, and M. Lundstrom IEDM Tech. Dig., 2003, pp.
29.5.1-29.5.4
[6] J.Wang, E. Polizzi, M. Lundstrom, A three-dimensional quantum
simulation of silicon nanowire transistors with the effective-mass
approximation,J. Appl. Phys. 96 (2004) 2192-2203.
[7] G. Fiori, and G. Iannaccone" Three-Dimensional Simulation of One-
Dimensional Transport in Silicon Nanowire Transistors" IEEE
TRANSACTIONS ON NANOTECHNOLOGY, VOL. 6, NO. 5,
SEPTEMBER 2007.
[8] R. Martel, T. Schmidt, H. R. Shea, T. Hertel, and P. Avouris, Appl.
Phys. Lett. 73, 2447 ~1998.
[9] A. Rahman, M. Lundstrom and A. W. Ghosh, "Generalized effectivemass
approach for n-type metal-oxide-semiconductor field-effect
transistors on arbitrary oriented wafers," J. Appl. Phys., vol. 97, pp.
053702.1-053702.12, Mar. 2005.
[10] R. Venugopal et al., "Simulating quantum transport in Nanoscale
transistors: Real versus mode-space approaches," J. App. Phys.,92, 3730
(2002).
[11] S. H. Zaidi, A. K. Sharma, R. Marquardt, S. L. Lucero and P. M.
Varangis, "Multiple nanowire field-effect transistors," Proc of the 2001
1st IEEE Conference on Nanotechnology, pp. 189-194, Oct. 2001.
@article{"International Journal of Electrical, Electronic and Communication Sciences:49637", author = "Fatemeh Karimi and Morteza Fathipour and Hamdam Ghanatian and Vala Fathipour", title = "A Comparison Study of Electrical Characteristics in Conventional Multiple-gate Silicon Nanowire Transistors", abstract = "In this paper electrical characteristics of various kinds
of multiple-gate silicon nanowire transistors (SNWT) with the
channel length equal to 7 nm are compared. A fully ballistic quantum
mechanical transport approach based on NEGF was employed to
analyses electrical characteristics of rectangular and cylindrical
silicon nanowire transistors as well as a Double gate MOS FET. A
double gate, triple gate, and gate all around nano wires were studied
to investigate the impact of increasing the number of gates on the
control of the short channel effect which is important in nanoscale
devices. Also in the case of triple gate rectangular SNWT inserting
extra gates on the bottom of device can improve the application of
device. The results indicate that by using gate all around structures
short channel effects such as DIBL, subthreshold swing and delay
reduces.", keywords = "SNWT (silicon nanowire transistor), non equilibriumGreen's function (NEGF), double gate (DG), triple gate (TG),multiple gate, cylindrical nano wire (CW), rectangular nano wire(RW), Poisson_ Schrödinger solver, drain induced barrier lowering(DIBL).", volume = "4", number = "9", pages = "1329-4", }