Abstract: Test data compression is an efficient method for reducing the test application cost. The problem of reducing test data has been addressed by researchers in three different aspects: Test Data Compression, Built-in-Self-Test (BIST) and Test set compaction. The latter two methods are capable of enhancing fault coverage with cost of hardware overhead. The drawback of the conventional methods is that they are capable of reducing the test storage and test power but when test data have redundant length of runs, no additional compression method is followed. This paper presents a modified Run Length Coding (RLC) technique with Multilevel Selective Huffman Coding (MLSHC) technique to reduce test data volume, test pattern delivery time and power dissipation in scan test applications where redundant length of runs is encountered then the preceding run symbol is replaced with tiny codeword. Experimental results show that the presented method not only improves the test data compression but also reduces the overall test data volume compared to recent schemes. Experiments for the six largest ISCAS-98 benchmarks show that our method outperforms most known techniques.
Abstract: In VLSI, testing plays an important role. Major
problem in testing are test data volume and test power. The important
solution to reduce test data volume and test time is test data
compression. The Proposed technique combines the bit maskdictionary
and 2n pattern run length-coding method and provides a
substantial improvement in the compression efficiency without
introducing any additional decompression penalty. This method has
been implemented using Mat lab and HDL Language to reduce test
data volume and memory requirements. This method is applied on
various benchmark test sets and compared the results with other
existing methods. The proposed technique can achieve a compression
ratio up to 86%.